Programmable logic devices with spare circuits for use in replacing defective circuits

• US 4,899,067 A
• Filed: 07/22/1988
• Issued: 02/06/1990
• Est. Priority Date: 07/22/1988
• Status: Expired due to Term

• Current Assignee: Altera Corporation (Intel Corporation)
• Original Assignee: Altera Corporation (Intel Corporation)
• Inventors: Wong, Sau-Ching, So, Hock-Chuen
• Primary Examiner(s): HUDSPETH, DAVID R
• Application Number:
  US07/222,832
• Time in Patent Office: 564 Days
• Field of Search: 307/202.1, 307/441, 307/465, 307/468-469, 307/219, 364/716, 365/185, 365/200
• US Class Current: 326/38
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17748 Structural details of configuration resources
• CPC Class Codes: H03K 19/17764 for reliability

Abstract

A programmable logic device having a plurality of word lines and a plurality of bit lines, each of which is programmably interconnectable to at least one of the word lines for producing on each bit line a signal which is a logical function of the signal or signals on the word line or lines to which that bit line is interconnected. The logic device further includes at least one spare word line and/or bit line for use in the event that one of the regular lines of the same kind in defective. When the spare line is to be used, the device is preprogrammed to automatically redirect all signals intended for the bad line to another line, thereby putting the spare line into use. The signals thus automatically redirected include both the signals used during program mode to selectively interconnect the word lines and bit lines and the data signals subsequently processed during normal operation of the device.

Claims

1. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said pluralities of conductors for producing an output indication of whether or not the associated conductor is to be used; and

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

wherein the plurality of conductors with which said preprogrammable means is associated includes a spare conductor for use in the event that one of the conductors in the same plurality, which are referred to as regular conductors, is not to be used, wherein said regular conductors are disposed in an ordered sequence on said programmable logic device, and wherein said signal diverting means comprises;

means responsive to an output indication from said preprogrammable means that a particular regular conductor is not to be used for shifting the signals associated with said particular regular conductor and any regular conductors to one side of said particular regular conductor in said ordered sequence to the corresponding next adjacent regular conductor in the direction of said shifting, the last of the shifted signals being diverted from the last of said regular conductors to said spare conductor.

2. The programmable logic device defined in claim 1 wherein said spare conductor is disposed after the end of said ordered sequence in the direction of said shifting.

3. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said plurality of conductors for producing an output indication of whether or not the associated conductor is to be used; and

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

wherein said device has (1) a program mode in which selected interconnections between said first and second conductors are established by applying selection signals to the first and second conductors to be interconnected, and (2) a normal operation mode in which input data signals are applied to said first conductors to produce output data signals on said second conductors, and wherein said signal diverting means diverts both the selection signals and the data signals associated with said particular conductor to another conductor in the same plurality.

4. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said pluralities of conductors for producing an output indication of whether or not the associated conductor is to be used; and

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

wherein said second conductors are grouped into a plurality of groups, wherein said programmable logic device includes means for logically combining the signals on at least some of the second conductors in each group to produce a further signal which is a logical function of the combined signals, wherein said preprogrammable means is associated with said second conductors and produces an output indication of whether or not any of said second conductors in each group and the means for logically combining associated with that group is not to be used, and wherein said signal diverting means is associated with said second conductors an responds to an output indication from said preprogrammable means that particular group and the associated means for logically combining are not to be used by diverting the signals associated with all of the second conductors in said particular group to another group.

5. The programmable logic device defined in claim 4 wherein said signal diverting means comprises:

means for substituting said further signal of said another group for said further signal of said particular group.

6. The programmable logic device defined in claim 4 wherein said groups include a spare group for use in the event that one of the other groups, which are referred to as regular groups, is not to be used, and wherein said signal diverting means comprises:

means responsive to an output indication from said preprogrammable means that any of said second conductors in a particular regular group and the means for logically combining associated with that group are not to be used for diverting the signals associated with all of the second conductors in said particular regular group to said spare group.

7. The programmable logic device defined in claim 4 wherein said groups include a spare group for use in the event that one of the other groups, which are referred to as regular groups, is not to be used, wherein said regular conductors are disposed in an ordered sequence on said programmable logic device, and wherein said signal diverting means comprises:

means responsive to an output indication from said preprogrammable means that any of said second conductors in a particular regular group and the means for logically combining associated with that group are not to be used fore shifting the signals associated with all of the second conductors in said particular regular group and any regular groups to one side of said particular regular group in said ordered sequence to the next adjacent regular group in the direction of said shifting, the signals for the last of the shifted regular groups being shifted to said spare group.

8. The programmable logic device defined in claim 7 wherein said spare group is disposed after the end of said ordered sequence in the direction of said shifting.

9. The programmable logic array device defined in claim 4 further comprising:

a plurality of first signal leads;

a plurality of second signal leads, each of which is programmably interconnectable to any one of said first leads;

second preprogrammable means associated with each of the leads in at least one of said pluralities of leads for producing an output indication of whether or not the associated lead is to be used;

second signal diverting means responsive to an output indication from said second preprogrammable means that a particular lead is not to be used for diverting the signals associated with said particular lead to another lead in the same plurality; and

means for selectively applying each of at least some of said further signals to a respective one of said first leads.

10. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said pluralities of conductors for producing an output indication of whether or not the associated conductor is to be used; and

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

wherein said preprogrammable means comprises a device selected from the group consisting of an EPROM, an EEPROM, a fuse, and an antifuse.

11. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said pluralities of conductors for producing an output indication of whether or not the associated conductors is to be used; and

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

wherein said preprogrammable means comprises opto-thermally alterable means.

12. A programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductors is interconnected, said programmable logic device comprising:

preprogrammable means associated with each of the conductors in at least one of said pluralities of conductors for producing an output indication of whether or not the associated conductor is to be used;

signal diverting means responsive to an output indication from said preprogrammable means that a particular conductor is not to be used for diverting the signals associated with said particular conductor to another conductor in the same plurality;

a plurality of first signal leads;

a plurality of second signal leads, each of which is programmably interconnectable to any one of said first signal leads;

second preprogrammable means associated with each of the leads in at least one of said plurality of leads for producing an output indication of whether or not the associated lead is to be used;

second signal diverting means responsive to an output indication from said second preprogrammable means that a particular lead is not to be used for diverting the signals associated with said particular lead to another lead in the same plurality; and

means for selectively applying the signal on each of at least some of said second leads to a respective one of said first conductors.

13. The programmable logic device defined in claim 12 further comprising:

means for selectively applying the signal on each of at least some of said second leads to a respective one of said first conductors.

14. The method of operating a programmable logic device having a plurality of first conductors and a plurality of second conductors, each of said second conductors being programmably interconnectable to each of said first conductors for producing on each of said second conductors a signal which is a logical function of the signals on the first conductors to which said second conductor is interconnected, said method comprising the steps of:

determining whether or not any one of the conductors in at least one of said pluralities of conductors is not to be used;

if any particular conductor is not to be used as determined in the preceding step, then modifying said device so that the signals associated with said particular conductor are diverted to another conductor in the same plurality; and

selectively applying programming signals to said first and second conductors of the modified device to selectively interconnect said first and second conductors and thereby program the device, any programming signals associated with said particular conductor being automatically diverted to said another conductor in the same plurality.

15. The method defined in claim 14 further comprising the step of:

selectively applying input data signals to said first conductors of the programmed modified device to produce output data signals on said second conductors, any data signals associated with said particular conductor being automatically diverted to said another conductor in the same plurality.