Architecture of the control of a high performance packet switching distribution network

• US 4,899,333 A
• Filed: 03/31/1988
• Issued: 02/06/1990
• Est. Priority Date: 03/31/1988
• Status: Expired due to Term

• Current Assignee: American Telephone & Telegraph Company (AT&T, Inc.), Bell Telephone Laboratories, Inc. (Nokia Corporation)
• Original Assignee: American Telephone & Telegraph Company (AT&T, Inc.)
• Inventors: Roediger, Gary A.
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Jung, Min
• Application Number:
  US07/175,542
• Time in Patent Office: 677 Days
• Field of Search: 370/60, 370/94, 370/61, 370/54
• US Class Current: 370/427
• CPC Class Codes: H04L 12/00 Data switching networks interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units G06F13/00
• CPC Class Codes: H04L 12/56 Packet switching systems

Abstract

A high capacity metropolitan area network (MAN) is described. Data traffic from users is connected to data concentrators at the edge of the network, and is transmitted over fiber optic data links to a hub where the data is switched. The hub includes a plurality of data switching modules, each having a control means, and each connected to a distributed control space division switch. Advantageously, the data switching modules, whose inputs are connected to the concentrators, perform all checking and routing functions, while the 1024×1024 maximum size space division switch, whose outputs are connected to the concentrators, provides a large fan-out distribution network for reaching many concentrators from each data switching module. Distributed control of the space division switch permits several million connection and disconnection actions to be performed each second, while the pipelined and parallel operation within the control means permits each of the 256 switching modules to process at least 50,000 transactions per second. The data switching modules chain groups of incoming packets destined for a common outlet of the space division switch so that only one connection in that switch is required for transmitting each group of chained packets from a data switching module to a concentrator. MAN provides security features including a port identification supplied by the data concentrators, and a check that each packet is from an authorized source user, transmitting on a port associated with that user, to an authorized destination user that is in the same group (virtual network) as the source user.

Claims

1. In a data network having a plurality of inlets and outlets, said network comprising first data switching means for switching received data packets, each packet comprising destination information, from at least one input terminal to at least one output terminal, said data switching means comprising a control means comprising:

a plurality of first processors for controlling the storing of each of said received data packets in a memory means; and

a plurality of second processors, responsive to said destination information of said received data packets, for ascertaining an identity of an outlet for reaching a destination specified by said destination information of each data packet, and for linking, for each outlet of said network, memory locations in said memory means of data packets whose destinations are reachable via said each outlet, wherein each of said packets further comprises source information, wherein said second plurality of processors comprises at least one processor for verifying authority of a source, identified by said source information of a packet, to transmit said packet.

2. The control means of claim 1 wherein each of said packets comprises an identity of a port transmitting said packet, wherein said at least one processor for verifying authorization of a source further comprises means for verifying said authorization by checking said port identity.

3. The control means of claim 2 wherein said second processors comprise means for linking packets in first-in-first-out order.

4. In a data network having a plurality of inlets and outlets, said network comprising first data switching means for switching received data packets, each packet comprising destination information, from at least one input terminal to at least one output terminal, said data switching means comprising a control means comprising:

a plurality of first processors each comprising its own memory, for controlling the storing of each of said received data packets in a memory means; and

a plurality of second processors, each comprising its own memory, responsive to said destination information of said received data packets, for ascertaining an identity of an outlet for reaching a destination specified by said destination information of each data packet, and for linking in memory of at least one of said second processors, for each outlet of said network, memory locations in said memory means of data packets whose destinations are reachable via said each outlet, said each outlet accessed from second switching means via an output terminal of said first switching means.

5. The control means of claim 4 further comprising means for requesting connection by said second switching means, connected to said outlets, from one of said at least one output terminal of said data switching means to one of said outlets.

6. A control means for a data switching module of a data network comprising:

a plurality of first processors each comprising its own memory, for controlling the storing of received data packets in memory;

a packet storage memory for storing said received data packets;

a memory manager processor having its own memory for allocating from its own memory to said first processors addresses in said packet storage memory;

a plurality of second processors each comprising its own memory, for communicating with said first processors, said communicating including receiving from said first processors header data of said received data packets and transmitting to said first processors memory addresses of said packet storage memory allocated by said memory manager processor;

a memory distributor processor having its own memory for communicating said addresses allocated by said memory manager to said second processors;

a plurality of source checker processors each comprising its own memory, responsive to said header data received from said second processors for checking, in data of tables of said source checker processors, that a source name comprised in said header data has been authorized to transmit data over said network;

a plurality of routing processors each comprising its own memory, for determining a destination for each of said packets;

wherein said memory manager processor is responsive to signals from a plurality of third processors to release blocks of memory of said packet storage memory for distribution by said memory distributor processor.

7. The control means of claim 6 further comprising:

a queue manager processor each comprising its own memory, for linking packets to be transmitted to each data transmission facility accessible via a circuit switch to said data switching module;

said plurality of third processors each comprising its own memory, for controlling the transmission of data packets stored in said memory to said circuit switch;

a switch setup control processor having its own memory, connectable to said circuit switch, responsive to signals from said queue manager processor for requesting connections in said circuit switch; and

a plurality of fourth processors each comprising its own memory, responsive to signals from said source checker processors for communicating with a data base to receive authorization data and for distributing such authorization data to said source checker processors and said router processors;

wherein said switch setup control processor is responsive to signals from said circuit switch to cause one of said plurality of third processors to transmit data to said circuit switch;

wherein said switch setup control processor is responsive to output signals from said plurality of third processors for requesting a disconnection by said circuit switch.

8. The control means of claim 7, further comprising:

an operation, administration and maintenance monitor processor means, responsive to signals from said plurality of fourth processors for accessing said data base;

wherein said source checker processors check for authorization of a combination of a source port, source name and group number comprised in said header data;

wherein said routing processors check that a combination of a destination name and group number comprised in said header data is authorized to receive packets.

10. The control means of claim 6 wherein said routing processors comprise means for translating from a symbolic destination to a physical destination.

9. In a data switching means, a method of processing received data packets in a data switching stage comprising the steps of:

storing said received data packets;

determining a destination for each stored data packet; and

linking groups of data packets having a common destination in a succeeding stage of switching.