Semiconductor integrated circuit device and process for producing the same
First Claim
1. A process for producing a semiconductor integrated circuit device having a multilayer wiring structure in which a first insulating film is interposed between an upper-level wiring and a lower-level wiring and the surface of said upper-level wiring is protected by a second insulating film, said method comprising the steps of:
- preparing a semiconductor substrate having an integrated circuit formed thereon, said integrated circuit including a semiconductor element having a PN junction, said substrate further having a multilayer wiring structure formed on its surface, said wiring structure being electrically connected to said integrated circuit;
selectively removing successively the second insulating film, the upper-level wiring under said insulating film and the first insulating film under said upper-level wiring in said multilayer wiring structure by machining with a focused ion beam to form a contact hole through which a surface of said lower-level wiring is exposed, said contact hole exposing a surface of the upper-level wiring;
changing a region of said upper-level wiring whose surface is exposed through said contact hole into an insulator; and
forming a connecting wiring by an optically pumped CVD method so as to extend over from the inside of said contact hole to a selective region on the surface of said second insulating film, said connecting wiring being electrically connected to said lower-level wiring the surface of which is exposed through said contact hole.
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Accused Products
Abstract
The present invention relates to a semiconductor integrated circuit device and a process for producing the same. A hole is bored in an insulating film above a portion of a wiring which is to be connected to another wiring by means of a focused ion beam. The inside of the hole and a predetermined region on the insulating film are irradiated with either a laser beam or an ion beam in a metal compound gas to deposit metal in the hole and on said region and a connecting wiring is formed by means of optically pumped CVD. To electrically connect upper- and lower-level wirings in a multilayer wiring structure by a connecting wiring, the connecting wiring is electrically isolated from an intermediate-level wiring through which it extends. The above-described arrangement enables provision of a hole with a focused ion beam and formation of a metal wiring on a selective region by means, for example, optically pumped CVD. Accordingly, it is possible to effect fine machining and electrically connect together wirings inside an LSI after the completion thereof. It is therefore possible to carry out debugging, repair and a defect analysis of the LSI.
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Citations
31 Claims
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1. A process for producing a semiconductor integrated circuit device having a multilayer wiring structure in which a first insulating film is interposed between an upper-level wiring and a lower-level wiring and the surface of said upper-level wiring is protected by a second insulating film, said method comprising the steps of:
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preparing a semiconductor substrate having an integrated circuit formed thereon, said integrated circuit including a semiconductor element having a PN junction, said substrate further having a multilayer wiring structure formed on its surface, said wiring structure being electrically connected to said integrated circuit; selectively removing successively the second insulating film, the upper-level wiring under said insulating film and the first insulating film under said upper-level wiring in said multilayer wiring structure by machining with a focused ion beam to form a contact hole through which a surface of said lower-level wiring is exposed, said contact hole exposing a surface of the upper-level wiring; changing a region of said upper-level wiring whose surface is exposed through said contact hole into an insulator; and forming a connecting wiring by an optically pumped CVD method so as to extend over from the inside of said contact hole to a selective region on the surface of said second insulating film, said connecting wiring being electrically connected to said lower-level wiring the surface of which is exposed through said contact hole. - View Dependent Claims (2, 3, 4, 5, 20, 23, 24, 25, 26)
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6. A process for producing a semiconductor integrated circuit device having a multilayer wiring structure in which a first insulating film is interposed between an upper-level wiring and a lower-level wiring and the surface of said upper-level wiring is protected by a second insulating film, said method comprising the steps of:
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preparing a semiconductor substrate having an integrated circuit formed thereof, said integrated circuit including a semiconductor element having a PN junction, said substrate further having a multilayer wiring structure formed on its surface, said wiring structure being electrically connected to said integrated circuit; selectively removing successively the second insulating film in said multilayer wiring structure by machining with a focused ion beam to form a contact hole which exposes the surface of the upper-level wiring in this region; selectively removing the upper-level wiring the surface of which is exposed through said contact hole by a wet etching process using said second insulating film as an etching mask to form an opening region in said upper-level wiring, said opening region having a larger diameter than that of said contact hole; selectively removing said first insulating film the surface of which is exposed through said contact hole by machining with a focused ion beam to form an opening portion which exposes the surface of said lower-level wiring in this region; and forming a connecting wiring by an optically pumped CVD method so as to extend over from the inside of said contact hole to a selective region on the surface of said second insulating film, said connecting wiring being electrically connected to said lower-level wiring the surface of which is exposed through said contact hole. - View Dependent Claims (7, 8, 9, 10, 27)
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11. A process for producing a semiconductor integrated circuit device having a multilayer wiring structure in which a plurality of layers of wirings are isolated from each other by respective insulating films and a connecting wiring is connected to a lower-level wiring through a contact hole provided so as to extend through an upper-level wiring, said process comprising the steps of:
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forming said contact hole by irradiation with an ion beam, said contact hole exposing a surface of the upper-level wiring; changing a portion of said upper-level wiring whose surface is exposed through said contact hole into an insulator; and forming said connecting wiring by laser CVD. - View Dependent Claims (12, 13, 14, 15, 16, 17, 21, 22, 29, 30)
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- 18. A process for producing a semiconductor integrated circuit device wherein holes are bored in an upper-level insulating film at a portion thereof where contact holes are to be provided by machining with an energy beam and then the insides of these holes and the region therebetween are irradiated with a laser or focused ion beam in an atmosphere containing a metal compound gas to deposit a metal on the irradiated regions, thereby forming a metal film between wirings and thus electrically connecting together these wirings, wherein the improvement comprises notching a portion of the upper-level wiring at which the metal is deposited to form a notch, the notch being formed so as to extend completely through the upper-level wiring at a location around the contact holes, thereby electrically isolating said portion from another portion of the upper-level wiring.
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31. A process for producing a semiconductor integrated circuit device having a multilayer wiring structure in which a plurality of layers of wirings are isolated from each other by respective insulating films and a connecting wiring is connected to a lower-level wiring through a contact hole provided so as to extend through an upper-level wiring, said process comprising the steps of:
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forming said contact hole by irradiation with a focused ion beam, so as to expose the lower-level wiring, the contact hole being formed so that upper portions of the hole are larger than lower portions; and forming said connecting wiring by irradiating the contact hole with a focused laser beam or focused ion beam, in an atmosphere of a metal compound gas, to deposit a metal of said connecting wiring.
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Specification