Power-saving type receiver

• US 4,903,335 A
• Filed: 01/18/1989
• Issued: 02/20/1990
• Est. Priority Date: 01/25/1988
• Status: Expired due to Term

• Current Assignee: Nitto Kohki Company Limited
• Original Assignee: Man Design Company Limited
• Inventors: Shimizu, Giichiro
• Primary Examiner(s): Griffin, Robert L.
• Assistant Examiner(s): Kunitz, Curtis A.
• Application Number:
  US07/298,044
• Time in Patent Office: 398 Days
• Field of Search: 455/127, 455/67, 455/343, 455/228, 455/226, 340/825.44, 340/825.47, 340/825.48
• US Class Current: 455/343.4
• CPC Class Codes: H04W 52/028 switching on or off only a part of the equipment circuit blocks
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A receiver includes a signal-receiving section for receiving input signals and outputting detection signal, and a power source for supplying power thereto. A first detector detects a preamble of each input signal while a second detector detects the end of a postamble of each input signal. A power supply section supplies the power to the signal-receiving section by turning on a switch connected between the signal-receiving section and the power source when the first detector detects the preamble of the input signal. A periodic power-supply section turns on the switch periodically to supply the power periodically to the signal-receiving section when the second detector detects the end of the postamble of each input signal.

Claims

1. A receiver for receiving input signals and outputting detection signals, each of said input signals including a preamble, a data portion, and a postamble, said receiver comprising:

signal-receiving means for receiving the input signals and outputting the detection signals;

power source means connected to the signal-receiving means, for supplying power thereto;

first detector means connected to the signal-receiving means, for detecting the preamble of each input signal;

second detector means connected to the signal-receiving means, for detecting the end of the postamble of each input signal;

switch means connected between the signal-receiving means and the power source means;

power-supply means connected to the switch means and the first detector means, for turning on said switch means for a predetermined time, thereby to supply the power to the signal-receiving means through the switch means, when said first detector means detects the preamble of the input signal, said predetermined time being proportional to the length of the data portion of each input signal; and

periodic power-supply means connected to the switch means and the second detector means, for periodically turning on the switch means to supply the power periodically to the signal-receiving means when said second detector means detects the end of the postamble of each input signal.

2. The receiver according to claim 1, further comprising clock-generating means for generating clock signals at predetermined time intervals, and wherein said periodic power-supply means periodically turns on said switch means at said intervals.

3. The receiver according to claim 2, wherein said time intervals are 10 ms.

4. The receiver according to claim 1, wherein the first detector means detects the preamble of each input signal by detecting that the input signal remains at a high level for a predetermined period of time.

5. The receiver according to claim 1, wherein said period of time intervals is 1 to 10 ms.

6. The receiver according to claim 1, wherein said second detector means detects the end of postamble of each input signal by detecting that the input signal remains at a low level for a predetermined period of time.

7. The receiver according to claim 6, wherein said time is 1 to 10 ms.

8. The receiver according to claim 1, wherein said power source means includes a battery.

9. The receiver according to claim 1, wherein said signal-receiving means comprises a high-frequency amplifier for amplifying each input signal, a frequency converter for converting the frequency of the input signal, and a detector for detecting the input signal whose frequency has been converted by said frequency converter.

10. A receiver for receiving input signals and outputting processed signals, each of said input signals including a preamble, a data portion, and a postamble, said receiver comprising:

signal-receiving means for receiving the input signals and outputting the processed signals;

power source means connected to the signal-receiving means, for supplying power thereto;

first detector means connected to the signal-receiving means, for detecting the preamble of each input signal;

second detector means connected to the signal-receiving means, for detecting the end of the postamble of each input signal;

switch means connected between the signal-receiving means and the power source means;

power-supply means connected to the switch means and the first detector means, for turning on said switch means for a predetermined time, thereby to supply the power to the signal-receiving means through the switch means, when said first detector means detects the preamble of the input signal, said predetermined time being proportional to the length of the data portion of each input signal; and

periodic power-supply means connected to the switch means and the second detector means, for periodically turning on the switch means to supply the power periodically to the signal-receiving means when said second detector means detects the end of the postamble of each input signal.

11. The receiver according to claim 10, further comprising clock-generating means for generating clock signals at predetermined time intervals, and wherein said periodic power-supply means periodically turns on said switch means at said intervals.

12. The receiver according to claim 11, wherein said time intervals are 10 ms.

13. The receiver according to claim 10, wherein the first detector means detects the preamble of each input signal by detecting that the input signal remains at a high level for a predetermined period of time.

14. The receiver according to claim 13, wherein said period of time intervals is 1 to 10 ms.

15. The receiver according to claim 10, wherein said second detector means detects the end of postamble of each input signal by detecting that the input signal remains at a low level for a predetermined period of time.

16. The receiver according to claim 15, wherein said time is 1 to 10 ms.

17. The receiver according to claim 10, wherein said power source means includes a battery.

18. The receiver according to claim 10, wherein said signal-receiving means comprises a high-frequency amplifier for amplifying each input signal, a frequency converter for converting the frequency of the input signal, and a detector for detecting the input signal whose frequency has been converted by said frequency converter.