Light blocking and cell spacing for liquid crystal matrix displays

• US 4,904,056 A
• Filed: 07/25/1989
• Issued: 02/27/1990
• Est. Priority Date: 07/19/1985
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Castleberry, Donald E.
• Primary Examiner(s): Miller, Stanley D.
• Assistant Examiner(s): Gross, Anita Pellman
• Application Number:
  US07/384,929
• Time in Patent Office: 217 Days
• Field of Search: 350/334, 350/337, 350/332, 350/333, 350/339 R, 350/339 F, 350/344
• US Class Current: 349/162
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/13392 spacers dispersed on the cell substrate, e.g. spherical particles, microfibres
• CPC Class Codes: G02F 1/13394 spacers regularly patterned on the cell subtrate, e.g. walls, pillars G02F1/133377 takes precedence
• CPC Class Codes: G02F 1/13629 Multilayer wirings

Abstract

Light blocking spacer material is disposed so as to at least partially cover the data and/or gate lines in a variety of liquid crystal display (LCD) devices. The material prevents spurious visual information from being displayed as a result of high RMS supply voltages applied to the data lines, such voltages acting to switch liquid crystal material at inopportune times and to thus degrade the displayed image. The light blocking material also enhances the displayed image by acting as a spacer between the front and back LCD device panels to insure uniform cell spacing. Light blocking material is also employed at the same time to prevent light from reaching light sensitive thin film field effect transistors (FETs) which operate to switch each cell or to establish gray levels therein. The light otherwise has a tendency to discharge the LCD cell, also hampering device function.

Claims

1. A liquid crystal display comprising:

a pair of flat substrate, at least one of which is transparent;

a quantity of liquid crystal material disposed and contained between said substrates;

an array of pixel electrodes disposed on said at least one substrate;

at least one ground plane electrode disposed on the other use of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode, with said at least one ground plane electrode and said array of pixel electrodes being transparent;

an array of amorphous silicon semiconductor switch elements associated with said pixel electrodes;

a set of electrically conductive data lines;

a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signals present on said gate lines; and

cured photopatterned polyimide light blocking spacer material disposed between said substrates so as to determine the distance between said substrates and disposed so as to block light from said semiconductor switch elements.

2. The display of claim 1 in which said light blocking spacer material is also disposed so as to at least partially cover said data lines or said gate lines.

3. The display of claim 1 in which said light blocking spacer material at least partially covers said gate lines.

4. The display of claim 1 in which said light blocking spacer material at least partially covers said gate lines.

5. The display of claim 1 in which said light blocking spacer material is in contact with both of said flat substrates.

6. The display of claim 1 in which said light blocking spacer material is formed on the same substrate as said semiconductor switch elements.

7. The display of claim 1 in which said light blocking spacer material is formed on a nontransparent one of said flat substrate.

8. The display of claim 1 in which said polyimide includes additional material selected from the group consisting of black pigments and black dyes.

9. The display of claim 1 in which said polyimide comprises cured polyamic acid.

10. The display of claim 1 in which the spacing between said flat substrates is approximately 6 microns.

12. The display of claim 1 in which said light blocking spacer exhibits a resistivity greater than 10¹⁰ ohm-cm.

13. The display of claim 1 in which said data lines are transparent.

14. The display of claim 1 in which said gate lines are transparent.

15. The display of claim 1 in which said semiconductor switch elements are light sensitive.

16. The display of claim 1 in which said semiconductor switch elements comprise field effect transistors having source, gate, and drain regions.

17. The display of claim 1 in which said semiconductor switch elements comprise thin film field effect transistors.

18. The display of claim 1 in which said transparent electrodes comprise indium tin oxide.

19. The display of claim 1 in which there is present only a single ground plane electrode.

20. The display of claim 1 in which both of said flat substrates are transparent.

21. The display of claim 1 in which said liquid crystal material is selected from the group consisting of dichroic liquid crystal material and twisted nematic liquid crystal material.

22. The display of claim 1 in which said pixel electrodes are approximately 0.01 inches square.

23. The display of claim 20 in which said semiconductor switch elements are approximately 0.001 inches square.

24. The display of claim 1 in which said light blocking spacer material is disposed on a color filter in registration with said pixel electrodes.

25. The display of claim 16 in which said drain regions are connected to said pixel electrodes.

26. The display of claim 1 further including a color filter in registration with said pixel cells.

27. The display of claim 1 further including a polarizer disposed external to and on opposite sides of said flat substrates and in which said liquid crystal material comprises twisted nematic material.

28. The display claim 1 further including a polarizer of disposed external to said flat substrates and in which the liquid crystal material comprises dichroic dye material, said polarizer being disposed so as not to be on a side of the display on which either the electrodes or the substrates on which the electrodes are disposed are opaque.

29. The display of claim 16 in which said gate lines comprise the same material as electrodes forming said FET gate regions.

30. The display of claim 1 in which said light blocking spacer material is disposed so as to prevent transmission of light in at least some locations between said pixel electrodes and either said gate lines or said data lines.

11. The display of claim 11 in which said light blocking spacer material exhibits an optical density greater than 3.

31. A liquid crystal display comprising:

a pair of flat substrates, at least one of which is transparent;

a quantity of liquid crystal material disposed and contained between said substrates;

an array of pixel electrodes disposed on said at least one substrate;

at least one ground plane electrode disposed on the other one of said substrate, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode, with said at least one ground plane electrode and said array of pixel electrodes being transparent;

an array of amorphous silicon semiconductor switch elements associated with said pixel electrodes;

a set of electrically conductive data lines;

a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signals present on said gate lines; and

cured photopatterned polyimide light blocking spacer material disposed so as to at least partially cover said data lines or said gate lines.

32. The display of claim 31 in which said light blocking spacer material is disposed so as to prevent transmission of light in at least some locations between said pixel electrodes and either said gate lines or said data lines.

33. A liquid crystal display comprising:

a pair of flat substrates, at least one of which is transparent;

a quantity of liquid crystal material disposed and contained between said substrates;

an array of pixel electrodes disposed on said at least one substrate;

at least one ground plane electrode disposed on the other one of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode, with said at least one ground plane electrode and said array of pixel electrodes being transparent;

an array of amorphous silicon semiconductor switch elements associated with said pixel electrodes;

a set of electrically conductive data lines, each of said data lines being partially duplicated along its length, respectively, so as to form a redundant conductive structure;

a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signal patterns present on said gate lines; and

cured photopatterned polyimide light blocking spacer material disposed so as to at least partially cover said data lines or said gate lines.

34. The display of claim 33 in which said light blocking spacer material is disposed so as to prevent transmission of light in at least some locations between said pixel electrodes and either said gate lines or said data lines.

36. The display of claim 34 in which said light blocking material is disposed so as to prevent transmission of light in at least some locations between said pixel electrodes and either said gate lines or said data lines.

35. A liquid crystal display comprising:

a pair of flat substrate, at least one of which is transparent;

a quantity of liquid crystal material disposed and contained between said substrates;

an array of pixel electrodes disposed on said at least one substrate;

at least one ground plane electrode disposed on the other one of said substrates, so that liquid crystal material is disposed between said pixel electrodes and said ground plane electrode, with said at least one ground plane electrode and said array of pixel electrodes being transparent;

an array of amorphous silicon semiconductor switch elements associated with said pixel electrodes;

a set of electrically conductive data lines, each of said data lines being partially duplicated along its length, respectively, so as to form a redundant conductive structure;

a set of electrically conductive gate lines, said switch elements, said data lines and said gate lines being electrically connected to permit voltages appearing on said data lines to be applied to select pixel electrodes in accordance with signal patterns present on said gate lines; and

a cured photopatterned polyimide light blocking material disposed so as to at least partially cover said data lines or said gate lines.