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Method of manufacturing lateral IGFETS including reduced surface field regions

  • US 4,904,614 A
  • Filed: 05/23/1988
  • Issued: 02/27/1990
  • Est. Priority Date: 06/08/1987
  • Status: Expired due to Term
First Claim
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1. A method of manufacturing a semiconductor device comprising a lateral insulated gate field effect transistor, which method comprises providing a semiconductor body having adjacent a given surface a first region of one conductivity type, first introducing impurities of the opposite conductivity type and then introducing impurities of the one conductivity type into the semiconductor body, heating the semiconductor body in an oxidising atmosphere to cause the introduced impurities to diffuse to define a first RESURF region of the opposite conductivity type adjacent the given surface and a second RESURF region of the one conductivity type within the first RESURF region adjacent the given surface and to grow a relatively thick layer of insulating material on the given surface overlying the first RESURF region, defining an insulated gate structure by providing a relatively thin region of insulating material on a first area of the given surface overlying the first RESURF region and providing a conductive layer extending on the relatively thin insulating layer and onto the relatively thick insulating layer and introducing impurities into the semiconductor body using the insulated gate structure as a mask to form source and drain regions aligned to the insulated gate structure with the second RESURF region providing a drain extension region aligning the drain region and the first RESURF region forming at least part of a well of the opposite conductivity type within which the source and drain regions are formed.

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