Control system to control operation of an apparatus, more particularly operation of an automotive vehicle
First Claim
1. A vehicular microcomputer system, to control operation of an internal combustion engine and additional vehicular apparatus, havinga central processing unit (30);
- an interface (20);
means (10) to apply apparatus operating data to the interface (20);
read-only memory (40);
a buffer random-access (RAM) memory (50);
an interconnection bus (80) interconnecting the central processing unit (30), the interface (20), the read-only memory (40) and the buffer memory (RAM) (50);
an auxiliary read-only memory (41) selectively connectable to said interconnection bus (80);
and means (11) coupled to the central processing unit (30) to recognize whether or not the auxiliary read-only memory (41) is connected to the bus (80),and comprising, in accordance with the invention,means for controlling the operation of the program of the central processing unit (30) includingprogram data (91-94) stored in modular or block form in the read-only memory (40) and auxiliary program data (95-98) stored in modular or block form in the auxiliary read-out memory (41);
the program data stored in the read-only memory (40) includinga basic organization program (93),a program step (91) for recognition of the presence of the auxiliary read-only memory (41); and
a conditional instruction that, whenever the presence of the auxiliary read-only memory (41) is recognized, the central processing unit (30) is to execute selected instructions or program steps (92, 96,97) from the read-only memory (40) and the auxiliary read-only memory (41) according to a program sequence (95), in the auxiliary memory (41), alternative to, and to the extent necessary, inverted with respect to, the sequence in said basic organization program (93).
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Accused Products
Abstract
To increase the versatility of a central processing unit (30) controlling an operating apparatus, such as apparatus including an engine, installed in an automotive vehicle, a main read-only memory (ROM, 40) stores not only operating data of the vehicle and/or the engine, but additionally, the organization program of the central processing unit (CPU, 30) in modular, or block form in the ROM (40). An auxiliary ROM (41) preferably an electronically erasable ROM is connectable, via an interconnection bus (80) to the CPU (30) and an initial program stored in the main ROM (40) provides a determination or recognition step to be carried out by the CPU (30) first, to determine if the auxiliary EPROM (41) is present; and, if so, to then address the auxiliary EPROM (41) for control of the program run of the CPU; if not, to take programming operating data directly from the ROM (40). The programming stored in the auxiliary EPROM (41) may direct the CPU (30) to carry out programming steps stored in the main ROM (40) in the stored sequence, or in changed sequences, as well as to take operating steps directly from the auxiliary EPROM (41). All programming data are stored in the auxiliary EPROM (41) also in modular or block form, and preferably include diagnostic programs relating to monitoring a function of the vehicle or of the engine, under control of data computed by the CPU (30).
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Citations
10 Claims
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1. A vehicular microcomputer system, to control operation of an internal combustion engine and additional vehicular apparatus, having
a central processing unit (30); -
an interface (20); means (10) to apply apparatus operating data to the interface (20); read-only memory (40); a buffer random-access (RAM) memory (50); an interconnection bus (80) interconnecting the central processing unit (30), the interface (20), the read-only memory (40) and the buffer memory (RAM) (50); an auxiliary read-only memory (41) selectively connectable to said interconnection bus (80); and means (11) coupled to the central processing unit (30) to recognize whether or not the auxiliary read-only memory (41) is connected to the bus (80), and comprising, in accordance with the invention, means for controlling the operation of the program of the central processing unit (30) including program data (91-94) stored in modular or block form in the read-only memory (40) and auxiliary program data (95-98) stored in modular or block form in the auxiliary read-out memory (41); the program data stored in the read-only memory (40) including a basic organization program (93), a program step (91) for recognition of the presence of the auxiliary read-only memory (41); and a conditional instruction that, whenever the presence of the auxiliary read-only memory (41) is recognized, the central processing unit (30) is to execute selected instructions or program steps (92, 96,97) from the read-only memory (40) and the auxiliary read-only memory (41) according to a program sequence (95), in the auxiliary memory (41), alternative to, and to the extent necessary, inverted with respect to, the sequence in said basic organization program (93). - View Dependent Claims (2, 3, 4, 5)
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6. Method of controlling operation of a motor vehicle having
a central processing unit (CPU) (30); -
an interface (20) and means (10) for applying operating data to the interface; a main read-only memory (ROM) (40) containing blocks of instructions; a buffer memory (RAM) (50); an interconnection bus (80) interconnecting the central processing unit (30), the interface (20), the main read-only memory (ROM) (40), and the buffer memory (RAM) (50); and an auxiliary read-only memory (EPROM) (41), containing blocks of instructions, selectively connectable to the interconnection bus (80); and
comprising, in accordance with the invention, the steps ofcontrolling the operation of the central processing unit (CPU) (30) as a function of both instructions stored in the main read-only memory (ROM) (40) and any instructions stored in the auxiliary read-only memory (41); and the step of determining, in a basic program step stored in the main read-only memory (40), whether or not the auxiliary read-only memory is connected to the interconnection bus (80); and (a) if no interconnection of the auxiliary read-only memory (41) to the interconnection bus (80) is recognized, executing in the CPU the instructions contained in the read-only memory (40), based on a program sequence (93) stored in the main read-only memory (40); and (b) if presence of the auxiliary read-only memory (41) is recognized, executing in the CPU a sequence of instructions specified by a program sequence (95) stored in said auxiliary ROM (41) including instructions stored in at least one of said main ROM (40) and said auxiliary ROM (41). - View Dependent Claims (7, 8, 9, 10)
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Specification