Process distribution and sharing system for multiple processor computer system
First Claim
1. A computer system, comprising:
- a multiplicity of distinct central processing units (CPUs), each having a separate, local, random access memory means to which said CPU has direct access;
at least one interprocessor bus coupling said CPUs to said multiplicity of memory means, so that each CPU can access both its own local memory means and the memory means of the other CPUs;
run queue means coupled to said CPUs for holding a separate run queue for each of said CPUs;
each said run queue holding a list of the processes waiting to run on the corresponding CPU;
process creation means in at least one of said CPUs for creating new processes, for assigning one of said CPUs as the home site of each new process, and for installing said new process in the local memory means for said home site; and
cross processor call means in each of said CPUs for temporarily transferring a specified process from its home site to another one of said CPUs, for the purpose of performing a task which cannot be performed on said home site, said cross processor call means including means for;
(a) placing said specified process on the run queue of said other CPU;
(b) continuing the execution of said specified process on said other CPU, using the memory means for said specified process'"'"'s home site as the resident memory for said process and using said interprocessor bus means to couple said other CPU to said home site memory means, until a predefined set of tasks has been completed; and
then(c) upon completion of said predefined set of tasks, automatically returning said specified process to its home site by placing said specified process on the run queue of said specified process'"'"'s home site, so that execution of the process will resume on said specified process'"'"'s home site.
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Accused Products
Abstract
A multiple processor (CPU) computer system, each CPU having a separate, local, random access memory means to which it has direct access. An interprocessor bus couples the CPUs to memories of all the CPUs, so that each CPU can access both its own local memory means and the local memories of the other CPUs. A run queue data structure holds a separate run queue for each of the CPUs. Whenever a new process is created, one of the CPUs is assigned as its home site and the new process is installed in the local memory for the home site. When a specified process needs to be transferred from its home site to another CPU, typically for performing a task which cannot be performed on the home site, the system executes a cross processor call, which performs the steps of: (a) placing the specified process on the run queue of the other CPU; (b) continuing the execution of the specified process on the other CPU, using the local memory for the specified process'"'"'s home site as the resident memory for the process and using the interprocessor bus to couple the other CPU to the home site'"'"'s local memory, until a predefined set of tasks has been completed; and then (c) placing the specified process on the run queue of the specified process'"'"'s home site, so that execution of the process will resume on the process'"'"'s home site.
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Citations
13 Claims
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1. A computer system, comprising:
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a multiplicity of distinct central processing units (CPUs), each having a separate, local, random access memory means to which said CPU has direct access; at least one interprocessor bus coupling said CPUs to said multiplicity of memory means, so that each CPU can access both its own local memory means and the memory means of the other CPUs; run queue means coupled to said CPUs for holding a separate run queue for each of said CPUs;
each said run queue holding a list of the processes waiting to run on the corresponding CPU;process creation means in at least one of said CPUs for creating new processes, for assigning one of said CPUs as the home site of each new process, and for installing said new process in the local memory means for said home site; and cross processor call means in each of said CPUs for temporarily transferring a specified process from its home site to another one of said CPUs, for the purpose of performing a task which cannot be performed on said home site, said cross processor call means including means for; (a) placing said specified process on the run queue of said other CPU; (b) continuing the execution of said specified process on said other CPU, using the memory means for said specified process'"'"'s home site as the resident memory for said process and using said interprocessor bus means to couple said other CPU to said home site memory means, until a predefined set of tasks has been completed; and
then(c) upon completion of said predefined set of tasks, automatically returning said specified process to its home site by placing said specified process on the run queue of said specified process'"'"'s home site, so that execution of the process will resume on said specified process'"'"'s home site. - View Dependent Claims (2, 3, 4)
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5. A computer system, comprising:
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a multiplicity of distinct central processing units (CPUs), each having a separate, local, random access memory means to which said CPU has direct access;
said CPUs having the capability of executing indivisible read modify write instructions;at least one interprocessor bus coupling said CPUs to all of said memory means, so that each CPU can access both its own local memory means and the memory means of the other CPUs; run queue means coupled to said CPUs for holding a separate run queue for each of said CPUs;
each said run queue holding a list of the processes waiting to run on the corresponding CPU;a run lock for each said run queue, said run lock having a first predefined value to indicate that the corresponding run queue is not in the process of being modified by any of said CPUs and is unlocked, and a value other than said first predefined value when the corresponding run queue is being modified by one of said CPUs and is therefore locked; run queue updating means coupled to said CPUs for adding or removing a specified process from a specified run queue, said run queue updating means including means for; (a) locking said specified run queue by (a,1) using an indivisible read modify write instruction to test the value of the run lock for said specified run queue and, if said run lock value indicates that said specified run queue is unlocked, to set said run lock to a value which indicates that said specified run queue is locked; and (a,2) if the test in step (a,1) determines that said run queue is locked, performing step (a,1) again after a predefined delay, until the test in step (a1) determines that said run queue is unlocked; (b) adding or removing a specified process from said specified run queue; and (c) unlocking said specified run queue by setting said run lock for said specified run queue to said first predefined value; process creation means in at least one of said CPUs for creating new processes, for assigning one of said CPUs as the home site of each new process, and for installing said new process in the local memory means for said home site; and cross processor call means in each of said CPUs for temporarily transferring a specified process from its home site to a specified one of said other CPUs, for the purpose of performing a task which cannot be performed on said home site, said cross processor call means including means for; (a) using said run queue updating means to add said specified process to the run queue of said specified CPU; (b) continuing the execution of said specified process on said specified CPU, using the memory means for said specified process'"'"'s home site as the resident memory for said process and using said interprocessor bus means to couple said specified CPU to said home site memory means, until a predefined set of tasks has been completed; and
then(c) upon completion of said predefined set of tasks, automatically returning said specified process to its home site by using said run queue updating means to add said specified process to the run queue of said specified process'"'"'s home site, so that execution of the process will resume on said specified process'"'"'s home site. - View Dependent Claims (6, 7)
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8. A computer system, comprising:
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a multiplicity of distinct central processing units (CPUs), each having a separate, local, random access memory means to which said CPU has direct access;
said CPUs having the capability of executing indivisible read modify write instructions;at least one interprocessor bus coupling said CPUs to all of said memory means, so that each CPU can access both its own local memory means and the memory means of the other CPUs; process creation means coupled to said CPUs for creating new processes, for assigning one of said CPUs as the home site of each new process, for installing said new process in the local memory means for said home site, and for assigning a home site priority to each new process, said home site priority being assigned a value within a predefined range of priority values; run queue means coupled to said CPUs for holding a separate run queue for each of said CPUs;
each said run queue holding a list of the processes waiting to run on the corresponding CPU;process table means coupled to said CPUs for retaining information regarding every process running or otherwise in existence in said system, including for each said process a HOME CPU parameter which indicates the home site of said process; a CURRENT CPU parameter which indicates the current CPU on which said process is running, waiting to run, or otherwise residing; and a PRIORITY parameter indicative of the priority of said process; cpustate table means for storing information regarding each said CPU, including; a run queue header identifying the run queue for said CPU; a current process parameter identifying the process currently running in said CPU; a last process parameter identifying the process which was run prior to the process currently running in said CPU; and a run lock parameter which is given a first predefined value to indicate that the corresponding run queue is not in the process of being modified by any of said CPUs and is unlocked, and a value other than said first predefined value when the corresponding run queue is being modified by one of said CPUs and is therefore locked; and run queue updating means coupled to said CPUs for adding or removing a specified process from a specified run queue, said run queue updating means including means for; (a) locking said specified run queue by (a,1) using said indivisible read modify write instruction to test the value of the run lock for said specified run queue and, if said run lock value indicates that said specified run queue is unlocked, to set said run lock to a value which indicates that said specified run queue is locked; and (a,2) if the test in step (a,1) determines that said run queue is locked, performing step (a,1) again after a predefined delay, until the test in step (a1) determines that said run queue is unlocked; (b) adding or removing a specified process from said specified run queue; (c) unlocking said specified run queue by setting said run lock for said specified run queue to said first predefined value; and (d) updating said run queue header, current process and last process parameters of the cpustate table means for the CPU corresponding to said specified run queue to reflect the current status of said CPU; process selection means in at least one of said CPUs for selecting a process to run on a specified one of said CPUs when the process currently running in said specified CPU is stopped, including means for selecting the process in said run queue for said specified CPU with the highest priority and means for initiating the running of said selected process in said specified CPU; and preemption means in each CPU for finding the highest priority process in its run queue, said preemption means including means for stopping the process currently running in said CPU, when said highest priority process has higher priority than the process currently running in said CPU, and then running said highest priority process; interrupt means in each said CPU for activating said preemption means in a specified one of the other CPUs; and cross processor call means in each of said CPUs for temporarily transferring a specified process from its home site to a specified one of said other CPUs, for the purpose of performing a task which cannot be performed on said home site, said cross processor call means including means for; (a) using said run queue updating means to add said specified process to the run queue of said specified CPU; (b) assigning said specified process a higher priority than its home site priority when it is added to said run queue for said specified other CPU; (c) using said interrupt means in said specified process'"'"'s home site CPU to activate said preemption means in said specified CPU when said specified process is added to said run queue for said specified CPU, so that said specified process will be preempt the process currently running in said specified CPU; (d) continuing the execution of said specified process on said specified CPU, using the memory means for said specified process'"'"'s home site as the resident memory for said process and using said interprocessor bus means to couple said specified CPU to said home site memory means, until a predefined set of tasks has been completed; and
then(e) upon completion of said predefined set of tasks, automatically returning said specified process to its home site by using said run queue updating means to add said specified process to the run queue of said specified process'"'"'s home site, so that execution of the process will resume on said specified process'"'"'s home site; and (f) resetting the priority for said specified process to its home site priority when said process is added to said run queue for its home site.
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9. A method of running a multiplicity of processes in a computer system, comprising the steps of:
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providing a computer system having (1) a multiplicity of distinct central processing units (CPUs), each having a separate, local, random access memory means to which said CPU has direct access;
said CPUs having the capability of executing indivisible read modify write instructions; and(2) at least one interprocessor bus coupling said CPUs to all of said memory means, so that each CPU can access both its own local memory means and the memory means of the other CPUs; wherein at least one of said CPUs is capable of performing one or more tasks that at least one of said other CPUs cannot perform; generating a run queue data structure for holding a separate run queue for each of said CPUs;
each said run queue holding a list of the processes waiting to run on the corresponding CPU;providing run queue updating means for adding or removing a specified process from a specified run queue; creating new processes, as the need arises, including the step of assigning one of said CPUs as the home site of each new process, and installing said new process in the local memory means for said home site; and when one of said processes needs to perform a task which cannot be performed on its home site, performing a cross processor call to temporarily transfer said process from its home site to a specified one of said other CPUs which is able to perform said task, be performing the steps of; (a) using said run queue updating means to add said process to the run queue of said specified CPU; (b) continuing the execution of said process on said specified CPU, using the memory means for said process'"'"'s home site as the resident memory for said process and using said interprocessor bus means to couple said specified CPU to said home site memory means, until a predefined set of tasks has been completed; and
then(c) upon completion of said predefined set of tasks, automatically returning said specified process to its home site by using said run queue updating means to add said process to the run queue of said process'"'"'s home site, so that execution of the process will resume on said process'"'"'s home site. - View Dependent Claims (10, 11, 12, 13)
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Specification