Integrated circuit reliability testing

• US 4,918,377 A
• Filed: 12/05/1988
• Issued: 04/17/1990
• Est. Priority Date: 12/05/1988
• Status: Expired due to Term

• Current Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Original Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Inventors: Sayah, Hoshyar R., Buehler, Martin G.
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): Nguyen, Vinh P.
• Application Number:
  US07/279,676
• Time in Patent Office: 498 Days
• Field of Search: 324/73 PC, 324/158 R, 324/62 R, 324/64, 324/73 R, 324/65 R, 437/8, 430/30
• US Class Current: 324/691
• CPC Class Codes: G01R 31/30 Marginal testing, e.g. by varying supply voltage testing computers during standby operation or idle time G06F11/22

Abstract

A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the "measured length" of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

Claims

1. Apparatus for use in determining the reliability of circuit conductors on an uneven surface of an integrated circuit device, wherein the surface has regions at first and second different heights and said circuit conductors have portions extending in steps between said regions of different heights, comprising:

an elongated assay conductor on said integrated circuit device which extends along multiple steps between regions at said first and second heights, said elongated conductor having opposite ends and assay conductor pads at said ends;

a test structure which includes a first elongated test conductor on said integrated circuit device which extends along a region of substantially constant height, said test conductor having the same width as portions of said assay conductor that lie at one of said heights, said conductor having opposite end portions and test structure pads at said test conductor end portions;

means connectable to said assay conductor pads for measuring the resistance along the length of said assay conductor, and connectable to said test structure pads for determining the resistance of said test structure conductor, whereby to obtain an indication of the reliability of said assay conductor.

2. The apparatus described in claim 1 wherein:

said test structure includes a second elongated test conductor on said integrated circuit device which extends along another region of substantially constant height, said first mentioned and second test conductors extending along regions of said first and second heights.

3. The apparatus described in claim 1 wherein:

said test structure includes a second test conductor having opposite end portions, said first mentioned test conductor and second test conductor respectively extending along first and second regions of said first and second heights, said end portions of said first and second test conductors each including a first end portion joined to the first end portion of the other test conductor;

said test structure pads including a pair of current pads each joined to second of said end portions of said test conductors, and two pairs of voltage pads each pair having a pad joined to an opposite end portion of one of said test conductors;

said means for measuring and determining including means for applying a current to flow between said pair of current pads and means for measuring the voltage between each of said pairs of voltage pads.

4. Apparatus for use in determining the reliability of circuit conductors on an uneven surface of an integrated circuit device wherein the surface has regions at first and second different heights and said circuit conductors have portions extending in steps between said regions of different heights, comprising:

an elongated assay conductor on said integrated circuit device, said assay conductor extending along multiple steps between regions at said first and second heights, said elongated conductor having opposite ends and having assay conductor pads at said ends;

a test structure assembly which includes first and second elongated test conductors each extending along a region of substantially uniform height, with said first and second test conductors lying at regions of said first and second heights, and with said first and second conductors having the same widths as portions of said assay conductor that lie respectively at said regions of first and second heights;

means for measuring the resistance along the length of said assay conductor, and along the length of each of said test conductors.

5. A method for judging the reliability of circuit conductors which have been formed on an uneven surface of an integrated circuit device wherein the surface has regions at first and second different heights and said circuit conductors have portions extending in steps between said regions of different heights, comprising:

forming an assay surface area on said integrated circuit device which has multiple regions at said first and second heights;

forming an elongated assay conductor on said assay surface area so the assay conductor extends in multiple steps over said regions of first and second heights thereon;

measuring the resistance along a known length of said assay conductor;

forming a first test conductor on a region of said assay surface area which is of substantially uniform height, at substantially the same time as said step of forming an elongated assay conductor; and

measuring the resistance along a known length of said test conductor, whereby to enable a determination of the effect of said multiple steps on the resistance of said assay conductor.

6. The method described in claim 5 wherein:

said step of forming a test conductor includes forming a second test conductor on a region of said assay surface area which is of substantially uniform height at substantially the same time as said first mentioned test conductor is formed, with the heights of said first and second test conductors at said first and second heights, and measuring the resistance along a known length of said second test conductor.

7. The method described in claim 5 wherein:

said step of forming a test conductor includes forming first and second test structures, including forming said first mentioned test conductor at said first height, forming a second test conductor at a substantially uniform height equal to said second height, with each test conductor having first and second opposite end portions, forming a connecting conductor that connects said first end portions of said first and second test conductors, forming a current pad at each of said second end portions of said test conductors, and forming a voltage pad at each end portion of each test conductor;

said step of measuring includes passing a current in series through said current pads and said test conductors, and measuring the voltage between the voltage pads at the opposite ends of each each test conductor.