×

Method and apparatus for linking processors in a hierarchical control system

  • US 4,918,589 A
  • Filed: 04/19/1989
  • Issued: 04/17/1990
  • Est. Priority Date: 10/31/1985
  • Status: Expired due to Term
First Claim
Patent Images

1. An inter-processor communication module for insertion into an equipment rack with a plurality of I/O modules and for connection to a backplane therein for transfer of I/O data between a higher-level system processor and a local area system processor in a programmable controller system, wherein the I/O data is of the type which is converted to and from operating signals for monitoring and controlling I/O devices on a real-time machine or process, the inter-processor communication module comprising:

  • serial channel controller means with a serial I/O port for sending and receiving serial data messages over a serial data channel to and from the higher-level system processor, wherein the serial data messages include I/O address information which relates I/O data in the serial data messages to I/O modules in the equipment rack with the inter-processor communication module;

    the serial channel controller means including means operatively connected to the serial data port and responsive to the address information in the serial data messages for inserting into, and extracting from, the serial data messages, I/O data which is related by address to the I/O modules in the equipment rack with the inter-processor communication module; and

    backplane controller means connected during operation to the backplane and responsive to address signals generated by the local area system processor during an I/O scan sequence for transferring the I/O data related to the I/O modules in the equipment rack through the backplane of the equipment rack to or from the local area system processor as a block of parallel data;

    a common read/write memory;

    arbitration circuitry coupling the serial channel controller means and the backplane controller means to the common read/write memory for alternating access to the common read/write memory; and

    wherein the serial channel controller means includes means for transferring the I/O data to or from the the common read/write memory as a block of I/O data;

    and wherein the backplane controller means includes means for transferring the block of I/O data to or from the common read/write memory to link the serial I/O port and the backplane.

View all claims
  • 0 Assignments
Timeline View
Assignment View
    ×
    ×