Recessed thermally conductive packaged semiconductor devices

• US 4,924,351 A
• Filed: 04/10/1989
• Issued: 05/08/1990
• Est. Priority Date: 06/20/1985
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Matsumoto, Hiroshi, Kato, Toshihiro, Emoto, Takao, Kojima, Shinjiro
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): SALATA, ANTHONY J
• Application Number:
  US07/334,771
• Time in Patent Office: 393 Days
• Field of Search: 361/385, 361/386, 361/387, 361/388, 264/272.17, 174/52.1, 174/52.2, 174/52.3, 174/52.4
• US Class Current: 361/718
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48472 the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/24 solid or gel at the normal operating temperature of the device H01L23/3135 takes precedence
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/3135 Double encapsulation or coating and encapsulation
• CPC Class Codes: H01L 23/4334 Auxiliary members in encapsulations H01L23/49568 takes precedence
• CPC Class Codes: H01L 23/49503 characterised by the die pad
• CPC Class Codes: H01L 23/49575 Assemblies of semiconductor devices on lead frames
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape

Abstract

A packaged semiconductor device having a semiconductor chip mounted on a bed part, a first molded layer which seals the bed part and the semiconductor chip such that the back of the bed part is exposed, a heat sink under the exposed back of the bed part and with a prescribed distance between it and the back of the bed part a second molded layer which is formed such that it covers the outside of the heat sink and the first molded layer, and also fills the gap between the exposed surface of the bed part and the heat sink, and leads which are disposed such that they pass through the second molded layer and their ends are in the first molded layer, and which are connected via bonding wires to the internal terminals of the semiconductor chip.

Claims

1. A packaged semiconductor device comprising:

a bed part having front surface and back surface;

a semiconductor chip mounted on said front surface of said bed part;

a first molded layer which seals said front surface of said bed part and said semiconductor chip to expose said back surface of said bed part;

a heat sink having first and second main surfaces, and facing said back surface of said bed part on said first main surface thereof with a gap of a prescribed distance from said back surface of said bed part;

a second molded layer formed to cover an outside of said heat sink and said first molded layer and fill said gap from one direction; and

leads which pass through said second molded layer, of which ends are disposed inside said first molded layer, and which are connected to internal terminals of said semiconductor chip;

wherein at least one of the back surface of said bed part and the first main surface of said heat sink is provided with a plurality of roughened recessed parts.

2. A packaged semiconductor device comprising:

a bed part having front surface and back surface;

a semiconductor chip mounted on said front surface of said bed part;

a first molded layer which seals said front surface of said bed part and said semiconductor chip to expose said back surface of said bed part;

a heat sink having first and second main surfaces, and facing said back surface of said bed part on said first main surface thereof with a gap of a prescribed distance from said back surface of said bed part;

a second molded layer formed to cover an outside of said heat sink and said first molded layer and fill said gap from one direction; and

leads which pass through said second molded layer, of which ends are disposed inside said first molded layer, and which are connected to internal terminals of said semiconductor chip;

wherein at least one of the back surface of said bed part and the first main surface of said heat sink is provided with a plurality of recessed parts; and

wherein the recessed parts are provided on both said back surface of said bed part and said first main surface of said heat sink.