Pattern recognition device

• US 4,926,491 A
• Filed: 06/06/1988
• Issued: 05/15/1990
• Est. Priority Date: 09/17/1984
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Tsuboi, Hiroyuki, Takebayashi, Yoichi, Maeda, Kenichi
• Primary Examiner(s): Boudreau, Leo H.
• Assistant Examiner(s): Couso, Jose L.
• Application Number:
  US07/203,505
• Time in Patent Office: 708 Days
• Field of Search: 364/513, 364/513.5, 381/36, 381/42, 381/43, 382/9, 382/10, 382/14, 382/15, 382/21, 382/30, 382/34, 382/36, 382/37, 382/38, 382/39, 382/41, 324/74 R, 434/185
• US Class Current: 382/155
• CPC Class Codes: G06F 18/28 Determining representative reference patterns, e.g. by averaging or distorting; Generating dictionaries

Abstract

A pattern recognition device is arranged to have learning of a reference pattern vector carried out in a recognition unit by making use of the pause periods in the recognition processing, without particularly providing a learning section for learning the reference pattern vector. Namely, a part or the entirety of the arithmetic processing unit where the recognition result is obtained in the recognition unit by collating the input pattern with the recognition dictionary, can be utilized as the learning portion of the reference pattern vector. In concrete terms, the operation of multiplication-accumulation (inner product) which represents the main operation in the recognition processing and the learning processing, can be carried out by means of similar processes of handling. Therefore, by utilizing the processing section for sum of the products operation, of the recognition unit, which is in the idle state for pattern recognition, it becomes possible to carry out learning the reference pattern vector efficiently in time, without forcibly interrupting the pattern recognition processing by formally setting a learning condition.

Claims

1. A pattern recognition device which carries out a recognition of input patterns by matching input patterns that are inputted successively with reference patterns, each reference pattern prepared in the form of a pattern vector by use of KL expansion for a characteristic kernel, comprising:

said pattern recognition device;

a reference pattern memory registering reference patterns in advance;

a recognition means for carrying out recognition by matching between an input pattern and a reference pattern in said reference pattern memory;

a learning means for carrying out learning of reference patterns by adjusting elements of each kernel in accordance with input patterns, said recognition means and learning means sharing one multiply and accumulate operator;

a control unit constructed to control said recognition means and said learning means such that learning of reference patterns is carried out in said multiply and accumulate operator when recognition in said recognition means is halted for absence of input patterns and wherein learning of said reference patterns is interrupted when recognition is resumed; and

an intermediate memory storing an intermediate state of learning which is interrupted by resuming recognition such that recognition and learning is successively performed.

2. The pattern recognition device as claimed in claim 1, further comprising a first operation processing section for carrying out recognition and learning.

3. The pattern recognition device as claimed in claim 2, wherein said first operation processing section is constructed to carry out a sum of products operation of recognition and learning.

4. The pattern recognition device as claimed in claim 3, wherein said control unit comprises a recognition operation control section controlling said first operation processing section and said reference pattern memory in order to carry out a sum of the products operation of recognition at said first operation processing section when executing recognition, a second operation processing section carrying out operations other than said sum of the products operation of recognition, a learning operation control section controlling said first operation processing section sand said reference pattern memory in order to carry out sum of the products operation of learning at said first operation processing section when executing learning, a third operation processing section carrying out operations other than said sum of the products operation of learning, and a control section constructed to control said recognition operation control section and said learning operation control section.

5. The pattern recognition device as claimed in claim 4, wherein said control unit is constructed to control said first operation processing section such that learning of said reference patterns is started in said first operation processing section in accordance with a signal indicating completion of recognition supplied from said recognition operation control section.

6. A pattern recognition device which carries out recognition of input patterns by matching input patterns that are inputted successively with reference patterns, each reference pattern being prepared in the form of a pattern vector by use of KL expansion for a characteristic kernel, comprising:

said pattern recognition device;

a reference pattern memory registering reference patterns;

a first operation processing section carrying out a sum of the products operation of recognition of said input patterns and/or a sum of the products operation of learning of said reference patterns;

a recognition operation control section controlling, when recognition is carried out, said first operation processing section and said reference pattern memory in order to carry out said sum of the products operation of said recognition at said first operation processing section;

a second operation processing section carrying out operations other than said sum of the products operation of said recognition;

a learning operation control section controlling, when learning is carried out, said first operation processing section and said reference pattern memory in order to carry out said sum of the products operation of said learning at said first operation processing section;

a third operation processing section carrying out operations other than said sum of the products operation of said learning;

a control section means for controlling said recognition operation control section and said learning operation control section such that said sum of the products operation of said learning of said reference patterns is carried out at said first recognition processing section, when said sum of the products operation of said recognition in said first recognition processing section is completed, such that said first recognition processing section is successively operated; and

a memory storing an intermediate state of learning which is interrupted by resuming recognition.

7. A pattern recognition device comprising:

an input unit through which patterns to be recognized are inputted to said device;

an operation unit generating products and sums;

a characteristic kernel memory storing characteristic kernels;

a recognition unit recognizing input patterns in cooperation with said operation unit by matching input patterns with reference patterns, each reference pattern prepared in the form of a pattern vector by use of KL expansion for a characteristic kernel stored in said characteristic kernel memory; and

a learning means for carrying out learning of reference patterns by modifying elements of at least one characteristic kernel with reference to said input patterns in cooperation with said operation unit, and wherein;

said operation unit begins operation for generating products and sums that are required for modification of characteristic kernels when a recognition process is halted;

when a flow of pattern input is stopped said operation unit halts operation required for recognition and begins operation required for modification; and

when said flow is resumed, said operation unit switches from operation required for modification to operation required for recognition at which time an intermediate result of said operation required for modification is stored in an intermediate memory.