Consecutive image processing system

• US 4,928,253 A
• Filed: 01/21/1987
• Issued: 05/22/1990
• Est. Priority Date: 01/25/1986
• Status: Expired due to Fees

• Current Assignee: Fujitsu Limited
• Original Assignee: Fujitsu Limited
• Inventors: Eguchi, Kaoru, Yamauchi, Junichi, Kabuyama, Noriko, Maejima, Kimiko
• Primary Examiner(s): Harkcom, Gary V.
• Assistant Examiner(s): HERNDON, HEATHER R
• Application Number:
  US07/005,776
• Time in Patent Office: 1,217 Days
• Field of Search: 364/518-521, 364/900 MS File, 340/747, 340/798, 340/799, 340/800, 365/189, 365/230, 382/47
• US Class Current: 345/539
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G09G 5/395 Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen G09G5/399 takes precedence
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

In a consecutive image processing system for smoothly and consecutively processing image data when transferring and displaying the image data stored in image memories and display memories, the system comprises: a host computer; an image control apparatus having at least a plurality of image memories divided into a plurality of memory areas for storing image frames having a display order, the display order being applied in such a manner that it is possible to perform a display based on either a memory switch or address switch, and a first microprocessor unit for commanding an enlargement rate, a memory transfer, and a display start based on a command from the host computer; and an image display apparatus having at least a plurality of display memories each divided into a plurality of memory areas corresponding to the image memory for storing image frames to be displayed, each image frame having a display order corresponding to the image memory, and a second microprocessor unit for commanding a memory switch and a start address of an enlarged image under an enlargement rate based on a command from the first microprocessor unit.

Claims

1. A consecutive image processing system for smoothly and consecutively processing image data when transferring and displaying said image data stored in image memories and display memories, said system comprising:

a host computer;

an image control means for controlling a display of images, having a plurality of image memories divided into a plurality of memory areas for storing image frames having a display order, said display order being applied to allow performance of a display based on either a memory switch or an address switch so that the memory switch and address switch are not performed simultaneously, and a first microprocessor unit for commanding an enlargement rate, a memory transfer, and a display start based on a command from said host computer; and

an image display means for displaying images, having a plurality of display memories each divided into a plurality of memory areas corresponding to said image memories for storing image frames to be displayed, each image frame having a display order corresponding to said image memories, and a second microprocessor unit for commanding a memory switch and a start address of an enlarged image under said enlargement rate based on a command from said first microprocessor unit.

2. A system as claimed in claim 1, wherein said image control means further comprises a memory transfer unit for transferring image data to said corresponding display memory based on said command from said first microprocessor unit.

3. A system as claimed in claim 1, wherein said image display means further comprises a timer for counting a transfer time and a display time, a memory switch unit for switching said image memories and enlargement processing unit for enlarging image data based on said enlargement rate, and a display section for displaying said image data on said display device.

4. A consecutive image processing system for smoothly and consecutively processing image data when transferring and displaying said image data stored in image memories and display memories, said system comprising:

a host computer;

an image control means for controlling a display of images, having an image memory divided into a plurality of memory areas for storing image frames having a display order, a timer for counting a transfer time and a display time, and a first microprocessor unit for commanding a memory transfer and display start based on a command from said host computer; and

an image display means for displaying images, having two display memories, each display memory being alternately displayed, and when one display memory is displayed, said image data in said image memory is transferred to the other display memory, and a second microprocessor unit for command a memory switch and a start address based on a command from said first microprocessor unit.

5. A system as claimed in claim 4, wherein said image control means further comprises a memory transfer unit alternately transferring said image data to said each display memory.

6. A system as claimed in claim 4, wherein said image display means further comprises a memory switch unit for switching said display memories, an enlargement processing unit for enlarging said image data based on a predetermined enlargement rate, and a display section for displaying said image data on a display device.

7. A consecutive image processing system for smoothly and consecutively processing image data when transferring and displaying said image data stored in image memories and display memories, said system comprising:

a host computer;

an image control means for controlling a display of images, having an image memory divided into a lower bits portion and an upper bits portion, each portion being divided into a plurality of memory areas, two look-up tables for storing light and shade data of said image data corresponding to said portion, a timer for counting a transfer time and a display time, and a first microprocessor unit for commanding a look-up table transfer and a display start based on a command from said hose computer; and

an image display means for displaying images, having a display memory divided into a lower bits portion and an upper bits portion corresponding to said image memory, each portion being alternately displayed, and when one display memory is displayed, said image data in said image memory is transferred to the other display memory, two look-up tables for storing contents corresponding to look-up tables in said image control means, and a second microprocessor unit for commanding a memory switch and a start address based on a command from said first microprocessor unit.

8. A system as claimed in claim 7, wherein said image control means further comprises a memory transfer unit for transferring said image data said lower and upper bits portions, and a look-up tables transfer unit for alternately transferring contents of said look-up tables.

9. A system as claimed in claim 7, wherein said image display means further comprises a look-up table switch unit for alternately switching said look-up table, and a display section for displaying said image data on a display device.

10. A consecutive image processing system for smoothly and consecutively processing image data when transferring and displaying said image data stored in image memories and display memories, comprising:

host computer means for processing data;

image display means for displaying said image data, comprising a plurality of image memories for storing said image data, each memory being divided into a plurality of memory areas, and each memory area being divided into lower and upper bits portions; and

image control means for controlling said image display means such, that said image data in each of said memory areas is alternately transferred and displayed.