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Process for preparing integrated circuit dies for mounting

  • US 4,930,216 A
  • Filed: 03/10/1989
  • Issued: 06/05/1990
  • Est. Priority Date: 03/10/1989
  • Status: Expired due to Term
First Claim
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1. A process for preparing integrated circuit dies for mounting on a substrate comprising,making holes through a wafer having a plurality of integrated circuit dies in which the dies include pads thereon connected to integrated circuits in the dies, said holes being placed between the dies and adjacent the pads,placing a layer of insulating material over the wafer and in the outer periphery of the holes,adding an electrically conductive connection between the top of each pad and the inside of the insulating material in an adjacent hole, andseparating the plurality of dies from each other along lines extending through the holes between the dies.

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