Wide bandwidth frequency doubler

• US 4,931,921 A
• Filed: 05/30/1989
• Issued: 06/05/1990
• Est. Priority Date: 05/30/1989
• Status: Expired due to Fees

• Current Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Original Assignee: Motorola, Inc. (Motorola Solutions, Inc.)
• Inventors: Anderson, Dale R.
• Primary Examiner(s): Wong, Peter S.
• Application Number:
  US07/358,330
• Time in Patent Office: 371 Days
• Field of Search: 363/157, 363/159, 363/163, 363/165, 328/15, 328/16, 328/20, 333/218, 333/167, 333/168, 333/175, 333/176, 331/19
• US Class Current: 363/163
• CPC Class Codes: H03B 19/06 by means of discharge device or semiconductor device with more than two electrodes

Abstract

A single-transistor frequency doubler uses an elliptical filter on the collector of the transistor to improve the bandwidth of the doubler. Bandwidths in excess of thirty five percent having relatively constant output power levels at frequencies over 200 MHz can be realized.

Claims

1. A frequency multiplier comprised of:

signal amplification means, having an input and an output, for amplifying an input signal and producing an output signal having harmonic frequency multiples of said input signal;

first elliptical filter means having a relatively low input impedance at the frequency of said input to said signal amplification means and a relatively high input impedance at a pass-band frequency range, said first elliptical filter means coupled to said output of said signal amplification means for attenuating electrical signals outside of said pass-band frequency range while substantially passing signals within said pass-band frequency range, said first elliptical filter means passing signals at frequency multiples of said signal input to the amplification means.

2. The frequency multiplier of claim 1 where said signal amplification means includes a transistor.

3. The frequency multiplier of claim 1 where said transistor is driven non-linearly.

4. The frequency multiplier of claim 1 where said elliptical filter has cascaded filter stages.

5. The frequency multiplier of claim 1 wherein said pass-band range of said first filter is substantially twice the frequency of said input signal.

6. The frequency multiplier of claim 1 wherein said first filter means suppresses, at the output of said signal amplification means, the frequency of said input signal.

7. The frequency multiplier of claim 1 where said first filter means has a low-impedance stop-band bandwidth of at least thirty five percent.

8. The frequency multiplier of claim 1 where said first filter means has a substantially high, flat output impedance in the pass-band range and a substantially lower impedance outside the pass-band.