Method and apparatus for protecting computer software utilizing coded filter network in conjunction with an active coded hardware device

• US 4,932,054 A
• Filed: 09/16/1988
• Issued: 06/05/1990
• Est. Priority Date: 09/16/1988
• Status: Expired due to Term

• Current Assignee: SafeNet Incorporated (Thales SA)
• Original Assignee: Richard E. Erett, Wayne W. Chou
• Inventors: Erett, Richard E., Chou, Wayne W.
• Primary Examiner(s): Buczinski, Stephen C.
• Assistant Examiner(s): GREGORY, BERNARR E
• Application Number:
  US07/245,714
• Time in Patent Office: 627 Days
• Field of Search: 364/200, 364/900, 364/246.6-246.9, 364/286.6, 364/969, 364/969.1-969.4, 364/971.1, 380/3-5, 380/23-25, 380/49, 380/50, 340/825.31, 340/825.34, 235/380, 235/382
• US Class Current: 705/55
• CPC Class Codes: G06F 21/123 by using dedicated hardware, e.g. dongles, smart cards, cryptographic processors, global positioning systems [GPS] devices
• CPC Class Codes: G06F 2211/007 Encryption, En-/decode, En-/decipher, En-/decypher, Scramble, (De-)compress

Abstract

Filter networks are incorporated within a software protection hardware device which is plugged into a communications port of a computer which device will select bits or combinations of bits emanating from the communications port resulting from commands of a controlling software in use with the computer which is desired to be protected. The filter networks select the bits of a disguised predetermined control code which when matched with a stored reference code results in an output from the filter used to activate functions within the protection device. A stream of bits including a disguised predetermined control code issuing from the computer through the security device are compared with a stored reference code in a programmable memory. When a match occurs an output emanates providing an acknowledgment code to the computer indicating that the hardware device has been plugged in and is a proper one. The stored reference code can be provided by a programmable memory using an intermediate storage register between the programmable memory and the selection network. The intermediate storage register is clocked changing the reference code in a predetermined manner. Accordingly, the reference code is changed in accordance with what is stored in the programmable memory and by the content of an intermediate register at any given time, the effect of which is to continually change the reference code by clocking the intermediate register.

Claims

1. The method of protecting computer software using a software protection hardware security device plugged into a communications port of a computer which is controlled by the computer software or software within computer control which is desired to be protected comprising the steps of:

applying a plurality of bits containing a disguised predetermined control code thereon to a port of a computer from software which is desired to be protected,

plugging a software protection hardware apparatus into said computer port containing a stored reference code which in at least one form corresponds to said disguised predetermined control code,

comparing said plurality of bits containing said disguised predetermined control code in said software protection hardware with said stored reference code and passing an operational signal when a match occurs,

utilizing said operational signal as an acknowledgement that the disguised predetermined control code is present in said plurality of bits.

2. The method of protecting computer software as claimed in claim 1 including the step of:

continually changing said stored reference code in a predetermined controlled manner.

3. The method of protecting computer software as claimed in claim 2 wherein the step of continually changing said stored reference code involves varying the state of a memory in which a reference is stored.

4. The method of protecting computer software as claimed in claim 1 wherein the steps of comparing said disguised predetermined control code with said stored reference code involves a plurality of successive comparisons which must match before an operational signal is passed.

5. The method of protecting computer software as claimed in claim 1 wherein said comparison step involves a series of comparison stages where outputs from prior stages are compared with different reference stages to produce said operational signal when a match occurs as a result of said comparisons in said series of comparison stages.

6. The method of protecting computer software as claimed in claim 5 which comparison step involves comparing the output from a previous stage with any selected signal.

7. A software protection hardware device which is plugged into a communications port of a computer to receive a plurality of bits from the computer containing a disguised predetermined control code resulting from commands from the software controlling the computer which software is desired to be protected comprising:

a digital decoder filter having an input and an output and a programmable memory coupled to said input for providing a stored reference code for said filter which in at least one form corresponds to said predetermined control code adapted to be plugged into a communications port of a computer,

comparison means in said digital decoder filter for comparing an input with said stored reference code and passing a operational control signal when a match occurs,

means for applying said plurality of bits including said disguised predetermined control code to the input of said filter,

and means coupled between said output of said filter and said computer port for applying said passed operational control signal to said computer port when a match occurs between said control code with said reference code.

8. The software protection hardware device as claimed in claim 7 including:

means coupled to said digital decoder filter for altering the stored reference code in a predetermined manner.

9. The software protection hardware device as claimed in claim 8 in which said means for altering the disguised predetermined code in a predetermined manner is an intermediate storage register.

10. The software protection hardware device as claimed in claim 8 wherein said digital decoder filter comprises a plurality of EXCLUSIVE NOR gates having inputs and an output and each EXCLUSIVE NOR gate having a programmable memory with a bit stored therein connected to the input thereof along with a bit of said series of bits from said computer port, an AND gate coupled to the outputs of said EXCLUSIVE NOR gates whereby only a correct combination of bits will produce an output when the bits applied correspond to the bits in memory which will produce an output from said AND gate when the proper byte is formed by said EXCLUSIVE gates.

11. The software protection hardware device as claimed in claim 10 in which each programmable memory is a temporary memory, and means coupled to said temporary memory for continually changing the output states of said temporary memories in a predetermined manner.

12. The software protection hardware device as claimed in claim 11 wherein said means for continually changing the output states of said temporary memories is an intermediate storage register.

13. The software protection hardware device as claimed in claim 7 in which said digital decoder filter comprises a plurality of filters each having a different bit of said plurality of bits from said computer applied thereto and each of which has a programmable memory with a stored reference code and means for combining the outputs of said plurality of filters when a match occurs to pass said operational control signal.

14. The software protection hardware device as claimed in claim 13 including means coupled to said memories for changing the reference code of each memory in a predetermined manner thereby controllably changing the stored reference code of each digital decoder filter.

15. The software protection hardware device as claimed in claim 13 wherein said plurality of filters are arranged in cascaded stages each having separately programmable memories controllable from different sources whereby the comparison between the plurality of bits from the computer takes place in said filter in a plurality of cascaded filters having different reference code controls.