Method of making high speed semiconductor device having a silicon-on-insulator structure

• US 4,933,298 A
• Filed: 12/19/1988
• Issued: 06/12/1990
• Est. Priority Date: 12/18/1987
• Status: Expired due to Term

• Current Assignee: Fujitsu Microelectronics Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Hasegawa, Mitsuhiko
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): Thomas, T.
• Application Number:
  US07/286,290
• Time in Patent Office: 540 Days
• Field of Search: 437/89, 437/99, 437/174, 437/173, 437/29, 437/40, 437/41, 437/62, 437/82, 437/83, 437/228, 357/40, 357/23.7
• US Class Current: 438/150
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02433 Crystal orientation
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02598 monocrystalline
• CPC Class Codes: H01L 21/02609 Crystal orientation
• CPC Class Codes: H01L 21/02675 using laser beams
• CPC Class Codes: H01L 21/02683 Continuous wave laser beam
• CPC Class Codes: H01L 21/02691 Scanning of a beam
• CPC Class Codes: H01L 21/76248 using lateral overgrowth techniques, i.e. ELO techniques
• CPC Class Codes: H01L 21/84 the substrate being other than a semiconductor body, e.g. being an insulating body
• CPC Class Codes: H01L 27/1207 combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits
• CPC Class Codes: Y10S 438/982 Varying orientation of devices in array

Abstract

A CMOS silicon-on-insulation structure is fabricated by first forming an insulating SiO₂ layer on a silicon substrate having a (110) plane. Openings are then formed in the SiO₂ layer to expose a part of the substrate, and a polycrystalline or an amorphous silicon layer is deposited on the SiO₂ layer and in the openings. The deposited silicon layer is divided into islands so that a first island includes one of the openings and a second island does not include any openings. A laser beam is then irradiated onto the islands so as to melt the islands, and when the laser light irradiation is discontinued, the melted islands recrystallize so that the first island forms a (110) plane and the second island forms a (100) plane. A p-channel MOSFET is fabricated on the first island, and an n-channel MOSFET is fabricated on the second island. The thus paired CMOS operates at high speeds, because the p-channel MOSFET using positive holes as the carrier is fast in a (110) crystal, and the n-channel MOSFET using electrons as the carrier is fast in a (100) crystal.

Claims

1. A method of fabricating a semiconductor device, comprising the steps of:

(a) forming an insulating layer on a silicon substrate having a (110) surface plane;

(b) forming an opening in the insulating layer so as to expose a part of the substrate;

(c) depositing a silicon layer on the insulating layer and the exposed part of the substrate;

(d) dividing the deposited silicon layer into first and second islands, the first island contacting the substrate through the opening and the second island being isolated from the substrate;

(e) recrystallizing the first island to form a (110) plane and the second island to form a (100) plane;

(f) forming a p-channel field effect transistor on the recrystallized first island; and

(g) forming an n-channel field effect transistor on the recrystallized second island.

2. A method of fabricating a semiconductor device according to claim 1, wherein said step (c) comprises depositing amorphous silicon.

3. A method of fabricating a semiconductor device according to claim 1, wherein said step (c) comprises depositing polycrystalline silicon.

4. A method of fabricating a semiconductor device according to claim 1, wherein said step (e) comprises the substeps of:

(i) irradiating a light beam onto the plurality of islands so as to melt the islands; and

(ii) discontinuing the irradiating of the light beam onto the islands so as to allow the melted islands to cool and recrystallize.

5. A method of fabricating a semiconductor device according to claim 1, further comprising, after said step (d), the step of:

(h) depositing a cap layer on the first and second islands to reduce reflection of light irradiated thereon.

6. A method of fabricating a semiconductor device according to claim 5, wherein said step (h) comprises depositing a silicon dioxide layer and a silicon nitride layer.

7. A method of fabricating a semiconductor device according to claim 1, further comprising, after said step (e), the step of:

(i) selectively removing a portion of the first island, the portion including the silicon above the opening.

8. A method of fabricating a semiconductor device, comprising the steps of:

(a) forming an insulating layer on a silicon substrate having a (110) surface plane;

(b) forming openings in the insulating layer to expose portions of the substrate therethrough;

(c) depositing a silicon layer on the insulating layer and the exposed portions of the substrate;

(d) dividing the deposited silicon layer into a plurality of first islands which include at least one of the openings and a plurality of second islands which include none of the openings;

(e) melting and recrystallizing the first and second islands;

(f) forming a p-channel field effect transistor on the recrystallized first islands; and

(g) forming n-channel field effect transistors on the recrystallized second islands.

9. A method of fabricating a semiconductor device according to claim 8, wherein said step (e) comprises the substeps of:

(i) heating the substrate;

(ii) irradiating the islands with a laser beam; and

(iii) cooling the islands so that each of the first islands recrystallize into a single crystal having a (110) plane, and each of the second islands recrystallize into a single crystal having a (110) plane.

10. A method of fabricating a semiconductor device according to claim 8, further comprising, after said step (d), the step of:

(h) depositing a cap layer on the first and second islands to reduce reflection of the laser beams.

11. A method of fabricating a semiconductor device according to claim 10, wherein the cap layer includes a silicon dioxide layer and a silicon nitride layer.

12. A method of fabricating a semiconductor device, comprising the steps of:

(a) forming an insulating layer on a silicon substrate having first surface plane indices;

(b) forming an opening in the insulating layer so as

(c) forming first and second silicon islands on the insulating layer, the first island being connected to the substrate through the opening and the second layer being isolated from the substrate;

(d) recrystallizing the first island to form the first surface plane indices therein and the second island to form second surface plane indices therein;

(e) forming a first-type field effect transistor on the recrystallized first island; and

(f) forming a second-type field effect transistor, opposite in polarity from the first-type field effect transistor, on the recrystallized second island.

13. A method of fabricating a semiconductor device according to claim 12, wherein said step (c) further comprises forming the islands from amorphous silicon.

14. A method of fabricating a semiconductor device according to claim 12, wherein said step (c) further comprises forming the islands from polycrystalline silicon.

15. A method of fabricating a semiconductor device according to claim 12, further comprising, after said step (c), the step of:

(g) depositing a cap layer on the first and second islands.

16. A method of fabricating a semiconductor device according to claim 15, wherein said step (d) comprises the substeps of:

(i) irradiating a light beam onto the cap layer so as to melt the islands; and

(ii) discontinuing the irradiating of the light beam onto the cap layer so as to allow the melted islands to cool and recrystallize.

17. A method of fabricating a semiconductor device according to claim 15, wherein said step (g) comprises depositing a silicon dioxide layer and a silicon nitride layer.