Light emitting diode array chip and method of fabricating same

• US 4,933,601 A
• Filed: 12/09/1988
• Issued: 06/12/1990
• Est. Priority Date: 12/09/1987
• Status: Expired due to Fees

• Current Assignee: Hitachi Cable Limited (Proterial Ltd.)
• Original Assignee: Hitachi Cable Limited (Proterial Ltd.)
• Inventors: Kurata, Kazuhiro, Sagawa, Toshio
• Primary Examiner(s): O'Shea, Sandra L.
• Application Number:
  US07/282,175
• Time in Patent Office: 550 Days
• Field of Search: 313/499, 313/500, 357/17, 357/23, 437/23, 437/91, 437/92, 437/127, 437/130, 437/133
• US Class Current: 313/500
• CPC Class Codes: B41J 2/45 using light-emitting diode [LED] or laser arrays
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 25/0753 the devices being arranged next to each other
• CPC Class Codes: H01L 27/153 in a repetitive configuration, e.g. LED bars
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01039 Yttrium [Y]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12041 LED
• CPC Class Codes: H01L 33/58 Optical field-shaping elements

Abstract

An LED array chip comprising; a first semiconductor layer having p-type conduction; a second semiconductor layer having a n-type conduction, possessing forbidden band width smaller than the first layer and provided on the first layer, so as to form a semiconductor chip having a pn junction at the interface with the first layer; the second layer being divided into a first region and a second region by etching the second layer through to the pn junction, the first region thereof being divided to form individual plural LEDs of predetermined configuration, and the n-type layer in the second region being converted to the p-type layer as so to serve as a common region; individual electrodes respectively provided to the surfaces of the LEDs; and a common electrode provided to the common region, parts of the exposed surface of the p-type layer corresponding to the LEDs serving as light emitting surfaces. The LED array chip is mounted on a printed circuit board by directly bonding the individual electrodes and the common electrode to the corresponding electrode pads of the printed circuit.

Claims

1. An LED array chip, comprising:

a first semiconductor layer having a first type of conduction;

a second semiconductor layer having a second type of conduction opposite to the first type, and possessing a forbidden band width smaller than that of the first layer, the second layer being disposed on the first layer

the second layer being divided into first and second separated regions, the first region being divided to define a plurality of individual LEDs of predetermined configuration, and the second region including a common region;

individual electrodes respectively provided at the surfaces of the LEDs; and

a common electrode provided in the common region,

parts of the exposed surface of the first layer respectively registered with the LEDs serving as light emitting surfaces.

2. An LED array chip according to claim 1, including a circuit printed on a substrate and wherein said individual electrodes provided at said individual LEDs are bonded directly to the circuit printed on the substrate.

3. An LED array chip according to claim 1, wherein said first layer has a thickness ranging from 50 to 500 μ

m.

4. An LED array chip according to claim 1, wherein said second layer has a thickness of between 1 to 30 μ

m.

5. An LED array chip according to claim 1, wherein the center-to-center distance of said individual electrodes is substantially equal to that of said LEDs.

6. An LED array chip according to claim 1, including convex lenses disposed on the light emitting surfaces of the first layer.

7. An LED array chip according to claim 2, wherein said first layer has a thickness ranging from 50 to 500 μ

m.

8. An LED array chip according to claim 2, wherein said second layer has a thickness of between 1 to 30 μ

m.

9. An LED array chip according to claim 3, wherein said second layer has a thickness of between 1 to 30 μ

m.

10. An LED array chip according to claim 2, wherein the center-to-center distance of said individual electrodes is substantially equal to that of said LEDs.

11. An LED array chip according to claim 3, wherein the center-to-center distance of said individual electrodes is substantially equal to that of said LEDs.

12. An LED array chip according to claim 4, wherein the center-to-center distance of said individual electrodes is substantially equal to that of said LEDs.

13. An LED array chip according to claim 2, including convex lenses disposed on the light emitting surfaces of the first layer.

14. An LED array chip according to claim 3, including convex lenses disposed on the light emitting surfaces of the first layer.

15. An LED array chip according to claim 4, including convex lenses disposed on the light emitting surfaces of the first layer.

16. An LED array chip according to claim 5, including convex lenses disposed on the light emitting surfaces of the first layer.

17. A method of fabricating an LED array chip, comprising the steps of:

(A) fabricating a p-type substrate;

(B) forming on the p-type substrate an n-type layer processing a ratio of mixed crystal smaller than that of the substrate, and defining of pn junction at the interface with the substrate;

(C) etching the n-type layer through to the pn junction so as to divide the n-type layer into a first region and a second region;

(D) dividing the first region of the n-type layer so as to form a plurality of individual LEDs;

(E) forming a common region in the second region of the n-type layer;

(F) forming a common electrode in the second region; and

(G) forming individual electrodes on the LEDs respectively.

18. A method of fabricating an LED array chip according to claim 17, wherein step (A) includes performing liquid phase epitaxial growth.

19. A method of fabricating an LED array chip according to claim 17, where step (E) includes diffusing or ion-implanting ZN into the n-type layer of the second region so as to change to n-type layer to a p-type layer.

20. A method of fabricating an LED array chip according to claim 17, wherein step (G) includes vapor deposition.