Amplifier having a constant-current bias circuit

• US 4,933,645 A
• Filed: 06/23/1988
• Issued: 06/12/1990
• Est. Priority Date: 11/21/1986
• Status: Expired due to Term

• Current Assignee: Takafumi Kasai
• Original Assignee: Takafumi Kasai
• Inventors: Kasai, Takafumi
• Primary Examiner(s): Mullins, James B.
• Application Number:
  US07/243,337
• Time in Patent Office: 719 Days
• Field of Search: 330/255, 330/265, 330/267, 330/268, 330/270, 330/273, 330/274
• US Class Current: 330/255
• CPC Class Codes: H03F 1/3217 in single ended push-pull amplifiers
• CPC Class Codes: H03F 3/3001 with field-effect transistors
• CPC Class Codes: H03F 3/3079 using parallel power transistors

Abstract

In an amplifier comprising an input stage having an inverting input terminal and a non-inverting input terminal, a voltage amplifier stage operatively connected to said input stage, and a SEPP output stage including first and second control ends connected to first and second relay output terminals of said voltage amplifier stage respectively, it is characterized by comprising a constant-current bias (CCB) circuit connected between the first and second relay output terminals so as to absorb the current bypassing between said relay output terminals. The first CCB circuit is connected in parallel to a so called constant-voltage bias circuit whose internal resistance has been increased as compared with that in the conventional CVB circuit so that most portion of the bias current borne by the CVB circuit is shared by the present CCB circuit. The second CCB circuit is a negative feedback-type CCB circuit which is controllable by means of a control voltage which is derived from a mean voltage generated from emitter resistor of power transistors, i.e., from the mean value of a voltage generated between the first and second resistors.

Claims

1. An amplifier comprising:

an input stage having an inverting input terminal and a non-inverting input terminal;

a voltage amplifier stage operatively connected to said input stage and having first and second relay output terminals;

a SEPP output stage including a first transistor having a base connected to said first relay output terminal and an emitter connected to one end of a first resistor, an output terminal directly connected to another end of said first resistor and to one end of a second resistor, and a second transistor having a base connected to said second relay output terminal and an emitter connected to another end of said second resistor, said second transistor having a polarity opposite to said first transistor; and

a voltage-controlled constant current bias circuit connected between said first and second relay output terminals and controlling a value of the constant current flowing through said first and second relay output terminals in response to a control voltage that is a mean value of a voltage between said one end of the first resistor and said other end of the second resistor via a high-cut filter, said voltage-controlled constant current bias circuit being free of direct connection with said output terminal.

2. An amplifier according to claim 1, wherein said high-cut filter includes an integrating resistor and a capacitor, said voltage-controlled constant current bias circuit including:

a junction-type N-channel FET having a drain connected to said first relay output terminal and a gate connected to said one end of said first resistor via said integrating resistor; and

a PNP transistor having an emitter connected to a source of said N-channel FET, a collector connected to the second relay output terminal and a base connected to said another end of said second resistor, said capacitor being connected between the gate of said N-channel FET and the base of said PNP transistor.

3. An amplifier according to claim 1, wherein said high-cut filter includes an integrating resistor and a capacitor, said voltage-controlled constant current bias circuit including:

a NPN transistor having a collector connected to the first relay output terminal and a base connected to one end of said first resistor; and

a junction-type P-channel FET having a source connected to the emitter of said NPN transistor, a drain connected to said second relay output terminal and a gate connected to said another end of said second resistor via said integrating resistor, said capacitor being connected between the base of said NPN transistor and the gate of said P-channel FET.

4. An amplifier according to claim 1, wherein said high-cut filter includes first integrating resistor, a second integrating resistor and a capacitor said voltage-controlled constant current bias circuit includes:

a junction-type N-channel FET having a drain connected to said first relay output terminal and a gate connected said one end of said first resistor via said first integrating resistor;

a junction-type P-channel FET having a source connected to the source of said N-channel FET, a drain connected to said second relay output terminal and a gate connected to said another end of said second resistor via said second integrating resistor, said

capacitor being connected between the gate of said N-channel FET and the gate of said P-channel FET.

5. An amplifier comprising:

an input stage having an inverting input terminal and a non-inverting input terminal;

a voltage amplifier stage operatively connected to said input stage and having first and second relay output terminals;

a SEPP output stage including a NPN transistor having a base connected to said first relay output terminal and an emitter connected to one end of a first resistor, an output terminal directly connected to another end of said first resistor and to one end of a second resistor, and a PNP transistor having a base connected to said second relay output terminal and an emitter connected to another end of said second resistor;

a second NPN transistor having a collector connected to said first relay output terminal, an emitter connected to said second relay output terminal and a base connected to said one end of the first resistor via a resistor, said second NPN transistor being free of direct connection with said output terminal; and

a capacitor connected between the base and the emitter of said second NPN transistor.

6. An amplifier comprising:

an input stage having an inverting input terminal and a non-inverting input terminal;

a voltage amplifier stage operatively connected to said input stage and having first and second relay output terminals;

a SEPP output stage including a first transistor having a base connected to said first relay output terminal and an emitter connected to one end of a first resistor, an output terminal directly connected to another end of said first resistor and to one end of a second resistor, and a second transistor opposite in conductivity to said first transistor having a base connected to said second relay output terminal and an emitter connected to another end of said second resistor;

a bipolar transistor connected to said first relay output terminal via a connection line and connected to said second relay output terminal and having a base connected to be responsive to a voltage developed in response to a current flowing through said first and second resistors, said bipolar transistor being free of direct connection with said output terminal; and

a capacitor connected between the base of said bipolar transistor and said connection line.