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Apparatus for maintaining consistency of a cache memory with a primary memory

DC
  • US 4,933,835 A
  • Filed: 01/19/1989
  • Issued: 06/12/1990
  • Est. Priority Date: 02/22/1985
  • Status: Expired due to Term
First Claim
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1. A computer system comprising:

  • primary memory means for storing data at storage locations therein;

    system bus means, coupled to the primary memory, for communicating data with the primary memory means;

    a first data processing element, coupled to the system bus means, for processing data from the primary memory means;

    a second data processing element for processing data from the primary memory means;

    cache memory means for storing data from the primary memory means, wherein data from the primary memory processed by the first and second data processing elements may be stored in the cache memory; and

    cache controller means, coupled to the system bus means, to the second data processing element, and to the cache memory means, for selectively communicating data between the primary memory means and the cache memory means and for communicating data between the cache memory means and the second data processing element, the cache controller means including primary memory access detecting means for detecting when the primary memory means is being accessed by the first data processing element.

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