Subthreshold CMOS amplifier with offset adaptation
First Claim
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1. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
- an output node,an inverting input node, said input node being a floating node forming the gate of at least one MOS transistor,a first capacitor for coupling an input to said circuit to said floating node,a second capacitor connected from said output node to said floating node,an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto both electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present.
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Abstract
An integrated circuit amplifier having a random input offset voltage is adaptable such that the input offset voltage may be cancelled out. An input node is a floating input node and is coupled to a source of input signal by a first capacitor. A second capacitor is connected between the output of the amplifier and the floating node. An ultraviolet window above the second capacitor allows the floating node to be charged, by the application of ultraviolet light, to a voltage which effectively cancels the input offset voltage.
277 Citations
19 Claims
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1. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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an output node, an inverting input node, said input node being a floating node forming the gate of at least one MOS transistor, a first capacitor for coupling an input to said circuit to said floating node, a second capacitor connected from said output node to said floating node, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto both electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present.
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2. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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an output node, a noninverting input node, an inverting input node, said inverting input node being a floating node and forming the gate of at least one MOS transistor, a first capacitor for coupling an input to said floating node, a second capacitor connected from said output node to said floating node, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto both electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present. - View Dependent Claims (3, 4)
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5. A method for minimizing the input offset voltage of an MOS amplifier having a floating inverting input node, said amplifier including a capacitor having juxtaposed plates coupling the output of said amplifier to said floating input node, including the step of:
providing ultraviolet light to said juxtaposed plates of said capacitor and allowing sufficient time for electrons excited by said ultraviolet light to equilibrate the voltage of said floating node to the voltage which would be present if said capacitor were replaced by a direct electrical connection.
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6. An analog MOS differential amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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a non-inverting input node, an inverting input node, an output node, a floating node, a first MOS input transistor, having its gate connected to said non-inverting input node, a second MOS input transistor, having its gate connected to said floating node, and its source connected to the source of said first MOS input transistor, current source means for supplying a bias current to the source of said first and second MOS input transistors, current mirror means, connected to the drains of said first and second MOS N-channel input transistors, for developing an output voltage proportionate to the difference between currents flowing in the drains of said first and second MOS input transistors, a first capacitor having a first electrode connected to said inverting input node and a second electrode connected to said floating node, a second capacitor having a first electrode connected to said output node and a second electrode connected to said floating node, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto said first and second electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present. - View Dependent Claims (7, 8)
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9. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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an input node, an output node, an MOS N-channel transistor and an MOS P-channel transistor, said MOS N-channel transistor having a source connected to a source of negative voltage, and its drain connected to the drain of said MOS P-channel transistor and to said output node, the source of said MOS P-channel transistor connected to a source of positive voltage, a floating gate common to said MOS N-channel transistor and said MOS P-channel transistor, a first MOS capacitor having a first electrode connected to said node and a second electrode comprising a portion of said floating gate, a second MOS capacitor having a first electrode connected to said output node and a second electrode comprising a portion of said floating gate, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor allowing for ultraviolet light to fall onto to said first and second electrodes of said second capacitor whereby the outset voltage of said amplifier can be adapted while a source of ultraviolet light is present.
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10. A circuit, integrated on an integrated circuit, including:
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an input node, an output node, a floating node, a first MOS analog transconductance amplifier having an inverting input connected to a source of input reference voltage, a non-inverting input connected to said input connected to a source of bias voltage, a second MOS analog transconductance amplifier having an inverting input connected to said floating node, a noninverting input connected to a source of output reference voltage, an output connected to the noninverting input of said first MOS analog transconductance amplifier and a bias input connected to a source of bias voltage, a first MOS capacitor having a first electrode connected to said output node and a second electrode connected to the inverting input of said second MOS analog transconductance amplifier, a second MOS capacitor having a first electrode connected to the inverting input of said second MOS analog transconductance amplifier, and a second electrode connected to the non-inverting input of said second MOS analog transconductance amplifier, a third MOS capacitor having a first electrode connected to the inverting input of said second MOS analog transconductance amplifier, and a second electrode connected to a source of fixed voltage, a fourth MOS capacitor having a first electrode connected to the inverting input of said second MOS analog transconductance amplifier, and a second electrode connected to the output of said second MOS analog transconductance amplifier, and an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said fourth capacitor for allowing ultraviolet light to fall onto said first and second electrodes of said fourth capacitor. - View Dependent Claims (11, 12, 13)
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14. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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a non-inverting input node, an inverting input node, an output node, a floating node, a first MOS N-channel input transistor, having its gate connected to said non-inverting input node, a second MOS N-channel input transistor, having its gate connected to said floating node, a first current mirror including first and second MOS P-channel transistors, said first MOS P-channel transistor having its drain and gate connected to the drain of said first MOS N-channel input transistor and its source connected to a source of positive voltage, said second MOS P-channel transistor having its gate connected to the gate of said first MOS P-channel transistor, its drain connected to said output node and its source connected to said source of positive voltage, an MOS N-channel bias transistor having its gate connected to a source of bias voltage, its drain connected to the source of said first MOS N-channel input transistor, and its source connected to a source of negative voltage, a second current mirror including third and fourth MOS P-channel transistors, said third MOS P-channel transistor having its drain and gate connected to the drain of said second MOS N-channel input transistor and its source connected to a source of positive voltage, said fourth MOS P-channel transistor having its gate connected to the gate of said third MOS P-channel transistor and its source connected to said source of positive voltage, a third current mirror including first and second MOS N-channel current mirror transistors, said first MOS N-channel current mirror transistor having its drain and gate connected to the drain of said fourth MOS P-channel transistor, and its source connected to said source of negative voltage, said second MOS N-channel current mirror transistor having its gate connected to the gate of said first MOS N-channel current mirror transistor, its drain connected to said output node and its source connected to said source of negative voltage, a first MOS capacitor having a first electrode connected to said inverting input node and a second electrode connected to said floating node, a second MOS capacitor having a first electrode connected to said output node and a second electrode connected to said floating node, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto said first and second electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present. - View Dependent Claims (15, 16)
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17. An analog MOS inverting amplifier fabricated as a part of an integrated circuit, said amplifier having a gain of magnitude much larger than 1, including:
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a non-inverting input node, an inverting input node, an output node, a floating node, a first MOS N-channel input transistor, having its gate connected to said non-inverting input node, a second MOS N-channel input transistor, having its gate connected to said floating node, an MOS N-channel bias transistor having its gate connected to a source of bias voltage, its drain connected to the source of said first MOS N-channel input transistor, and its source connected to a source of negative voltage, first and second MOS P-channel transistors, said first MOS P-channel transistor having its drain and gate connected to the drain of said first MOS N-channel input transistor and its source connected to a source of positive voltage, said second MOS P-channel transistor having its drain connected to the drain of said second MOS N-channel input transistor and its source connected to said source of positive voltage, a first MOS capacitor having a first electrode connected to said inverting input node and a second electrode connected to said floating node, a second MOS capacitor having a first electrode connected to said output node and a second electrode connected to said floating node, an opaque layer covering portions of the surface of said integrated circuit containing active circuits, said opaque layer having an aperture therein above said second capacitor for allowing ultraviolet light to fall onto said first and second electrodes of said second capacitor whereby the offset voltage of said amplifier can be adapted while a source of ultraviolet light is present. - View Dependent Claims (18, 19)
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Specification
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Current AssigneeSynaptics Incorporated
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Original AssigneeSynaptics Incorporated
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InventorsAllen, Timothy P., Mead, Carver A.
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Primary Examiner(s)Mullins, James B.
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Application NumberUS07/282,176Time in Patent Office557 DaysField of Search330/9, 330/59, 330/253, 330/261, 330/264, 330/307, 330/308, 357/23.5US Class Current365/185.32CPC Class CodesG06N 3/063 using electronic meansH01L 27/0629 in combination with diodes,...H03F 1/0261 with control of the polaris...H03F 1/303 using a switching device H0...H03F 3/45753 using switching means, e.g....H03F 3/45977 using switching means, e.g....
