Node for a fast packet-switching network in optical-electrical technology

• US 4,939,721 A
• Filed: 01/13/1989
• Issued: 07/03/1990
• Est. Priority Date: 02/29/1988
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: CSELT Centro Studi e Laboratori Telecomunicazioni SpA (Telecom Italia S.p.A.)
• Inventors: De Bosio, Alfredo
• Primary Examiner(s): Olms, Douglas W.
• Assistant Examiner(s): Jung, Min
• Application Number:
  US07/297,573
• Time in Patent Office: 536 Days
• Field of Search: 370/60, 370/58, 370/1, 370/4, 370/94.1, 370/94.2, 455/600, 350/13, 350/14, 350/15
• US Class Current: 370/392
• CPC Class Codes: H04L 49/101 using crossbar or matrix
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/3009 Header conversion, routing tables or routing tags
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04Q 11/0005 Switch and router aspects
• CPC Class Codes: H04Q 11/0066 Provisions for optical burst or packet networks
• CPC Class Codes: H04Q 2011/0011 using wavelength conversion
• CPC Class Codes: H04Q 2011/0039 Electrical control
• CPC Class Codes: H04Q 2011/0041 Optical control

Abstract

A node for a fast packet-switching network in optical-electrical technology comprises an optical switching matrix and electrical control equipment which processes the signalling and the information packet headers. More particularly, the control equipment updates the label and, depending on such a label, searches for the routing through the node. A centralized node controller processes the signalling, while a distributed processing system processes the packet headers and routes the packets through the network. For all communications in progress, the distributed processing system periodically forwards routing requests to an electrical self-routing switching matrix associated with the optical matrix. When a connection path has been found between an input and an output of the electrical matrix, the same path is reproduced in the optical matrix and the packets are transferred to the node output through the optical matrix.

Claims

1. A node for a fast packet-switching network in optical-electrical technology, wherein switching takes place on the basis of routing information contained in a header of each of a succession of packets, comprising:

an optical switching matrix having a plurality of stages, each comprising a plurality of switching elements, for switching optical information packets transmitted as optical signals;

an electrical switching matrix for searching a routing through the node from information contained in the headers of the information packets and converted into electrical form;

the configuration taken by the electrical switching matrix;

a first group of processing devices associated with the inputs of the electrical switching matrix for the electrical processings of information packet headers necessary to each for a connection path between an input and an output of the electrical switching matrix and for updating the headers in the optical information packets;

a second group of electrical processing devices associated with outputs of the electrical switching matrix for recognizing that a connection has been set up between an input and an output of the electrical switching matrix and forwarding a packet acknowledging such setup to the processing devices of the first group; and

a centralized node controller for the electrical processing of signalling packets.

2. A node as defined in claim 1, wherein the electrical switching matrix comprises the same number of stages and the same number of elements as the optical switching matrix and is topologically identical thereto.

3. A node as defined in claim 1 wherein each input of the optical switching matrix is connected with an optical buffer for temporarily storing the packets to be optically switched for the time necessary to search for and set up a connection path between an input and an output of the electrical switching matrix and to set up the optical switching matrix, the packets stored in all buffer being read at a same time instant.

4. A node as defined in claim 2 wherein said processing devices of the first group are connected to the centralized controller from which they receive information necessary to update the information packet header and to build therein a routing tag for the routing through the electrical switching matrix, the header updating being effected directly in the optical packets contained in said buffers.

5. A node as defined in claim 1 wherein a memory is connected between the electrical and the optical switching matrixes to store information in electrical signal form indicating a configuration of elements of the electrical switching matrix, said information being transferred to homologous elements of the optical switching matrix as a setting command.

6. A node as defined in claim 1 further comprising synchronization means for extracting from the arriving packet flow timing signals for packet acquistion by the node.

7. A node as define in claim 1, further comprising a local time base generating timing signals for the various devices in the node and organizing the switching operations in the node into working cycles of constant duration and comprising a first phase wherein the electrical switching matrix is set and the headers of the packets present in the optical buffers are updated, a second phase in which the optical switching matrix is set and the processing devices of the second group send to the processing devices of the first group packets acknowledging that a connection has been established between a node input and output, and a third phase in which optical packets for which a routing path through the node has been found are forwarded through the optical matrix to node outputs.

8. A node as defined in claim 1 wherein signalling packets and information packets present on a common input/output line of the node are transmitted with different wavelengths.

9. A node as defined in claim 8 wherein input/output lines of the node, which convey both packet types, are provided with means for recognizing information packets and signalling packets and sending the former towards the optical switching matrix and the first group of processing devices and the latter towards the centralized controller (CEL), and respectively with means for recombining the packets switched by the optical matrix and the signalling packets emitted by the centralized controller into a single flow of optical packets.

10. A node as defined in claim 6 wherein the synchronization means comprises a first synchronization device for recognizing the beginning of each signalling packet and extracting from the signalling packet flow timing signals for signalling packet acquistion by the node and a second synchronization device for recognizing the beginning of each information packet and extracting from the information packet flow timing signals for information packet acquisition by the node.

11. A node as defined in claim 7 wherein information and signalling packets present on a same input/output line of the node are transmitted at different speeds.