System for bumpless changeover between active units and backup units by establishing rollback points and logging write and read operations

• US 4,941,087 A
• Filed: 09/18/1987
• Issued: 07/10/1990
• Est. Priority Date: 09/19/1986
• Status: Expired due to Term

• Current Assignee: ASEA AB Vasteras Sweden
• Original Assignee: Asea Aktiebolag (ABB Limited)
• Inventors: Kap, Mladen
• Primary Examiner(s): Eng, David Y.
• Assistant Examiner(s): Lee, Thomas C.
• Application Number:
  US07/097,784
• Time in Patent Office: 1,026 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/132, 364/187, 371/12
• US Class Current: 710/260
• CPC Class Codes: G06F 11/142 Reconfiguring to eliminate the error group management mechanisms in a peer-to-peer network H04L67/1044
• CPC Class Codes: G06F 11/20 using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
• CPC Class Codes: G06F 11/2025 using centralised failover control functionality
• CPC Class Codes: G06F 11/2028 eliminating a faulty processor or activating a spare
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

The central unit of a computer equipment has a processor and a memory as well as redundant units as backup units for the processor and/or the memory. Further, there are members for changeover from an active unit to a corresponding backup unit in the event of a fault in the active unit. The central unit has interrupt routines and carries out write and read operations against the peripheral units of the equipment. A bumpless changeover from an active unit to a backup unit is obtained by establishing rollback points (P₀ -P₄) in the program execution by storing the processor state and the memory content in at least all hardware initiated interrupt routines; by logging all operations against the peripheral units after each rollback point; by returning the program execution, after a changeover (at P_f) to a backup unit, to the last established rollback point (P₁); and by thereafter resuming the execution without performing any operations against the peripheral units, whereby instead the result of read operations is fetched from the log and write operations are skipped, until all the logged operations have been repeated; and by thereafter continuing the execution while performing operations against the peripheral units.

Claims

1. In computer equipment, a method of bumpless changeover of function from active units to backup units in a central unit, the central unit having at least one active processor, at least one active memory, at least one redundant unit as a backup unit for at least one of said active units, and members for effecting the changeover of the function from an active unit to a backup unit, the processor handling interrupts with the aid of interrupt routines of which at least some are hardware initiated, each of the interrupt routines having one entry point, where the execution of the routine is started, and one interrupt acknowledgement point, the central unit effecting write and read operations against peripheral units included in the computer equipment, wherein the method comprises the following steps:

(a) establishing successive rollback points by the active processor during program execution, in at least all hardware initiated interrupt routines between the entry point and the interrupt acknowledgement point, by storing status of the active processor and at least contents of those parts of the active memory which have been modified by the active processor;

(b) logging said write and read operations against the peripheral units after each rollback point;

(c) after changeover of the function from an active unit to a backup unit, returning the program execution to the last established rollback point by restoring the contents of the active memory and the status of the active processor to the respective contents and status established by a corresponding unit previously active at said rollback point, whereafter resuming the program execution without carrying out any write and read operations against the peripheral units;

(d) during the following program execution, fetching the results of the read operations already performed against the peripheral units from the log until all logged operations have been repeated; and

(e) continuing the program execution while carrying out operations against the peripheral units.

2. A method according to claim 1, wherein the status of a processor, when establishing a rollback point, is stored by first storing it in the active memory and thereafter storing it in a second memory together with the contents of said parts of the active memory.

3. A method according to claim 1, wherein the contents of said parts of the active memory are stored in a backup memory.

4. A method according to claim 2, wherein the contents of said parts of the active memory are stored by a process comprising the steps of:

logging changes in cells of active memory between two consecutive rollback points simultaneously with the program execution; and

initiating transfer of the logged changes to the corresponding cells in the second memory at each rollback point.

5. A method according to claim 4, wherein the transfer of the logged changes to the second memory is carried out simultaneously with and independently of the logging of the subsequent changes in the active memory, thereby establishing the execution of the program to be continued from the rollback point without any delay pending the completion of the transfer.

6. A method according to claim 4, wherein a first copy of the contents of the active memory is saved in the second memory, thereby establishing the first rollback point, by a process comprising read/write operations of each cell in the active memory in which each read/write operation is carried out in an indivisible memory reference operation.

7. A method according to claim 1, further comprising the steps of:

determining that a fault has occurred in the active memory;

disconnecting the faulty memory;

connecting a backup memory;

returning the program execution of a processor to the last rollback point; and

resuming the program execution from the rollback point;

thereby recovering the central unit after a fault has occurred in the active memory.

8. A method according to claim 1, further comprising the steps of:

determining that a fault has occurred in the active processor;

disabling the faulty processor;

transferring the functions of the faulty processor to a backup processor;

switching to a backup memory;

returning the program execution of the active processor to the lost rollback point; and

resuming the program execution from the rollback point;

thereby recovering the central unit after a fault has occurred in the active processor.

9. In a computer equipment having a central unit wherein bumpless changeover of function from active units to backup units take place, the central unit having at least one active processor for handling interrupts with the aid of interrupt routines of which at least some are hardware initiated and have an entry point in which the execution of the routine is started and an interrupt acknowledgement point, the central unit further including at least one active memory, at least one redundant unit as a backup unit for at least one of said active units, and members for effecting changeover of the function from an active unit to a backup unit, the central unit effecting write and read operations against peripheral units included in the computer equipment, wherein the computer equipment further comprises:

(a) members for establishing successive rollback points for the active processor during program execution by storing, in at least all hardware initiated interrupt routines between the entry point and the interrupt acknowledgement point, status of the active processor and at least contents of those parts of the active memory which have been modified by the active processor;

(b) members for logging said write and read operations against the peripheral units after each rollback point;

(c) members, connected to said storing members, for returning the program execution to the last established rollback point, after changeover of the function from the active unit to the backup unit, by restoring the contents of the active memory and the status of active processor to the respective contents and status established by a corresponding unit previously active at said rollback point, and thereafter for resuming the program execution without carrying out any write and read operations against the peripheral units; and

(d) members, connected to said logging members, for fetching, during the following program execution, results of read operations already performed against the peripheral units from the log until all logged operations have been repeated, and thereafter to continue the program execution while carrying out operations against the peripheral units.

10. Computer equipment according to claim 9, wherein the central unit includes a redundant processor unit, the computer equipment further comprising:

members for selecting between an active function and a backup function of the processors of the central unit and for causing, in case of an active function of a processor, said processor to carry out the function of the computer by executing programs and carrying out operations against the peripheral units;

members for connecting a processor having an active function to the peripheral units to make it the active processor and for disconnecting a processor having a backup function from the peripheral units to make it a backup processor; and

members for disconnecting said active processor and connecting said backup processor when a fault is detected in said active processor.

11. Computer equipment according to claim 9, wherein the central unit includes a redundant memory, the computer equipment further comprising:

members for selecting between an active function and a backup function of the memories of the central unit and for causing, in case of an active function, a memory to be referred to continuously when programs are being executed by the active processor;

members for connecting an active memory to and for disconnecting a backup memory from the active processor; and

members for disconnecting said active memory from and for connecting said backup memory to the active processor when a fault in said active memory is detected.

12. Computer equipment according to claim 9, further comprising:

a first buffer memory for connecting via a signal path to said active memory for logging write operations therein, the first buffer memory further connecting via another signal path to a backup memory for transfer of the logged memory operations to corresponding cells therein; and

a second buffer memory for connecting via a further signal path to the peripheral units for logging read and write operations against the same, the second buffer memory further connecting to the active processor for reading of the logged peripheral unit operations by said active processor.

13. Computer equipment according to claim 9, further comprises:

(a) two central units each including at least one processor and one memory;

(b) members for selecting between an active central unit function and a backup function for each central unit, wherein, when it is in the active central unit function, the central unit executes the function of the computer by executing programs and carrying out operations against the peripheral units;

(c) members for connecting the active central unit to and disconnecting the backup central unit from the peripheral units;

(d) members for disconnecting said active central unit from and connect the backup central unit to the peripheral units when a fault is detected in the active central unit; and

(e) a device, connected to both central units, including;

a first buffer memory for connecting to the memory of the active central unit for logging the write operations therein, and for further connecting to the memory of the backup central unit for transfer of the logged write operations to corresponding cells therein; and

a second buffer memory for connecting via a signal path to the peripheral units for logging read and write operations against said units, and further for connecting to the central units for reading of the logged peripheral unit operations by said central units.