Synchronous phase and/or frequency detection system

• US 4,942,365 A
• Filed: 07/24/1989
• Issued: 07/17/1990
• Est. Priority Date: 07/24/1989
• Status: Expired due to Fees

• Current Assignee: Teltest Development Laboratories Incorporated
• Original Assignee: Teltest Electronics Laboratories Incorporated
• Inventors: Satterwhite, James R.
• Primary Examiner(s): Callahan, Timothy P.
• Application Number:
  US07/384,414
• Time in Patent Office: 358 Days
• Field of Search: 328/133, 328/134, 328/32, 328/26, 328/140, 307/511, 307/512, 307/516, 307/271, 307/529, 307/240, 307/525, 307/526, 307/527
• US Class Current: 327/41
• CPC Class Codes: H03D 1/2245 using two quadrature channels H03D1/2209 takes precedence
• CPC Class Codes: H03D 3/007 by converting the oscillations into two quadrature related signals H03D3/245 takes precedence

Abstract

A circuit and method for detecting and determining the magnitude of either a synchronous frequency signal whose phase relationship to a reference signal is known or unknown or a non-synchronous signal near the reference frequency is based on using a pair of synchronous detectors one of which develops a COS Output and the other of which develops a SIN Output. The input sides of both synchronous detectors are connected to receive the signal being processed. The synchronous detector which develops the COS Output is connected to a first reference signal and the other synchronous detector input is connected to a second reference signal having a plus 90 degree phase relationship with the first reference signal. The COS Output and SIN Output are fed through a chopper analog switch controlled by a chop frequency and then to a RMS detector which develops the desired output.

Claims

1. A detection circuit for detecting and determining the magnitude of a synchronous frequency signal whose phase relationship to a given reference frequency is known or unknown or a non-synchronous signal near the reference frequency, comprising:

(a) a first synchronous detector;

(b) a second synchronous detector;

(c) a first signal source means providing;

(i) a first signal comprising a first reference frequency fed to the input side of said first synchronous detector; and

(ii) a second signal comprising a second reference frequency having a plus 90 degree phase relation to the first reference frequency, said second signal being fed to the input side of said second synchronous detector;

(d) a second signal source means providing a third signal comprising a signal to be detected and whose magnitude is to be determined and characterized by being either a synchronous frequency signal whose phase relationship to the first reference frequency is known or unknown or a non-synchronous signal near the first reference frequency, said third signal being fed to the input sides of both said first and second synchronous detectors;

(e) a chopper analog switch having two parallel single pole switches with input and output sides and one of which on its input side is connected to the output of the first synchronous detector and the other of which on its input side is connected to the output of the second synchronous detector;

(f) a RMS detector having input and output sides, the output sides of said single pole switches being connected to the input side of said RMS detector;

(g) a square wave driven chop frequency source connected to means operative to open and close said single pole switches at opposite times at said chop frequency, said chop frequency being higher than the output frequency of said synchronous detectors; and

(h) wherein said first synchronous detector provides a COS Output, said second synchronous detector provides a SIN Output and said RMS detector provides an output indicative of the presence and magnitude of said third signal and if the relative phase of the input signal to the reference is "a" degrees, said COS and SIN outputs being defined by the relation COS Output =0.636×

Peak Signal×

COS(a) and SIN Output=0.636×

Peak Signal×

SIN(a).

2. A detection circuit as claimed in claim 1 wherein said first signal source means comprises separate signal sources for said first and second signals.

3. A detection circuit as claimed in claim 1 wherein said first and second reference frequencies are adjustable.

4. A detection circuit as claimed in claim 2 wherein said signal sources for said first and second signals are adjustable.

5. The method of detecting and determining the magnitude of a synchronous frequency signal whose phase relationship to a reference frequency is known or unknown or a non-synchronous signal near the reference frequency, comprising:

(a) establishing a network comprising;

(i) first and second synchronous detectors with inputs and outputs;

(ii) a first signal source means providing a first reference signal fed to the input of the first synchronous detector;

(iii) a second signal source means providing a second reference signal plus 90 degrees out of phase with the first reference signal and fed to the input of the second synchronous detector; and

(iv) means to sequentially connect the outputs of the first and second synchronous detectors to an RMS detector having an output for displaying a signal representative of the presence and magnitude of the signal sought to be detected;

(b) feeding the signal sought to be detected to the inputs of both said first and second synchronous detectors enabling the first synchronous detector to develop a Cosine Output expressed by the relation Cosine Output=0.636×

Peak Signal×

COS(a) where (a) is the relative phase of the signal sought to be detected to the first reference signal and the second synchronous detector to develop a Sine Output expressed by the relation SIN Output=0.636×

Peak Signal×

SIN(a); and

(c) observing the signal produced by the RMS detector output as an indication of the presence and magnitude of the signal sought to be detected.

6. The method of claim 5 wherein said first and second signal source means are established as a single signal source providing both said first reference signal and said second reference signal.

7. The method of claim 5 wherein said sequential connection of the outputs of said first and second synchronous detectors is at a frequency substantially higher than the highest frequency of said COS and SIN outputs.

8. The method of claim 5 wherein said first and second signal sources provide respectively adjustable first and second reference signals.

9. The method of claim 7 wherein said sequential connection frequency is established by a square wave chop frequency source.