Digitally calibrated delta-sigma analog-to-digital converter

• US 4,943,807 A
• Filed: 04/13/1988
• Issued: 07/24/1990
• Est. Priority Date: 04/13/1988
• Status: Expired due to Term

• Current Assignee: Cirrus Logic Incorporated
• Original Assignee: Crystal Semiconductor Corporation (Cirrus Logic Incorporated)
• Inventors: Harris, Larry L., Callahan, Michael J. Jr., Early, Adrian B.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): Williams, Howard L.
• Application Number:
  US07/180,889
• Time in Patent Office: 832 Days
• Field of Search: 341/118, 341/120, 341/131, 341/139, 341/140, 341/141, 341/143, 341/155
• US Class Current: 341/120
• CPC Class Codes: H03M 3/38 Calibration
• CPC Class Codes: H03M 3/458 Analogue/digital converters using delta-sigma modulation as an intermediate step

Abstract

A self-calibrated analog-to-digital converter with a corrected output includes an analog modulator (18) for receiving an analog input voltage and outputting a pulse train having a value proportional to the analog input voltage. The pulse train is filtered by a digital filter (20) which has the output thereof input to a calibration module (24). The calibration module (24) is controlled by a calibration control circuit (28) and is operable to correct the output to account for offset and gain errors. Prestored calibration parameters in a register (30) are utilized for this compensation. In a self-calibration mode, the control circuit (28) is operable to control a calibration multiplexer (12) to select a zero-scale input voltage on a terminal (16) and a full-scale reference voltage on a terminal (14) for input to the modulator (18). The multiplexer (12) is controlled to selcet the zero-scale reference to calculate an offset value for storage in the register (30) and then subsequently select the full-scale reference to calculate a scale factor for storage in the register (30 ). The self-calibration mode utilizes a settling counter (36) to insure that the output of the filter (20) has settled prior to making any calculations.

Claims

1. A self-calibrating analog-to-digital converter, comprising:

an oversampled analog modulator for receiving said analog input signal and outputting a digital signal that is proportional to said analog input signal;

a digital filter for filtering out noise on the digital output of said analog modulator;

storage means for a storing digital calibration parameters;

output compensation means for compensating the digital output of said digital filter in accordance with a predetermined compensation algorithm that is a function of said digital calibration parameters; and

calibration means for generating said calibration parameter for storing in said storage means in response to a calibration control signal, said calibration means including;

means for inputting at least one predetermined analog value to the input of said oversampled analog modulator,

means for comparing the digital value output by said digital filter to a predetermined expected value when said one predetermined analog value is input thereto and determining if there is a difference therebetween, and

generating said calibration parameters such that said generated calibration parameters are used in conjunction with said predetermined compensation algorithm will result in a predetermined digital value being output from said output compensation means when an analog input signal equal to said one predetermined analog value is input to said oversampled analog modulator.

2. The analog-to-digital converter of claim 1 wherein said analog modulator comprises a delta-sigma modulator.

3. The analog-to-digital converter of claim 1 wherein said output compensation means comprises offset compensation circuitry for offsetting the digital output value of said digital filter by a predetermined offset, said predetermined offset comprising said digital calibration parameter.

4. The analog-to-digital converter of claim 1 wherein said output compensation means comprises gain correction circuitry for multiplying the digital output of said digital filter by a predetermined gain scaling factor, said predetermined gain scaling factor comprising said digital calibration parameter.

5. The analog-to-digital converter of claim 1 wherein said calibration control signal is externally generated.

6. The analog-to-digital converter of claim 1 wherein said the combination of said analog modulator and said digital filter has a finite response time and wherein said calibration means further comprises means for inhibiting said means for comparing from operating until a predetermined duration of time has elapsed to allow the digital output of said digital filter to settle after said predetermined analog value is input thereto.

7. The analog-to-digital converter of claim 1 wherein said means for inputting comprises a multiplexer having one input thereof for receiving the analog input signal and the other input thereof for receiving said one predetermined analog value, said one predetermined analog value selected in response to said calibration means receiving said calibration control signal.

8. A self-calibrating analog-to-digital converter, comprising:

an oversampled analog modulator for receiving said analog input signal and outputting a digital signal that is proportional to said analog input signal;

a digital filter for filtering out noise on the digital output of said analog modulator;

storage means for storing a plurality of digital calibration parameters;

output compensation means for compensating the digital output of said digital filter in accordance with a predetermined compensation algorithm that is a function of said digital calibration parameters; and

calibration means for generating said calibration parameters for storing in said storage means in response to receiving an external calibration control signal, said calibration means including;

means of inputting a predetermined analog value into said oversampled analog modulator,

means for comparing the digital value output by said digitial filter to at least one of a plurality of predetermined expected values when said predetermined analog values are input thereto and determining if there is a difference therebetween, and

means for generating said calibration parameters such that said generated calibration parameters in conjunction with said predetermined compensation algorithm will result in a predetermined digital value being output from said output compensation means when an analog input signal equal to said one predetermined analog value is input to said oversampled analog modulator.

9. The analog-to-digital converter of claim 8 wherein said output compensation means comprises:

offset circuitry for offsetting the digital value output by said digital filter by a predetermined offset value; and

gain correction circuitry for multiplying the digital output of said digital filter after offsetting by said offset circuitry by a predetermined gain scaling factor;

said digital calibration parameters comprised of said offset value and said predetermined gain scaling factor.

10. A self-calibrating analog-to-digital converter, comprising:

an oversampled analog modulator for receiving said analog input signal and outputting a digital signal that is proportional to said analog input signal;

a digital filter of filtering out noise on the digital output of said analog modulator;

storage means for storing digital calibration parameters containing a dc offset value and a gain scaling factor;

output compensation means operable in a normal compensation mode for digitally compensating the digital output of said digital filter for dc offset and gain compensation in accordance with a predetermined compensation algorithm that is a function of said digital calibration parameters stored in said storage means; and

calibration means operable in a calibration mode to receive the digital output of said digital filter in response to first and second predetermined analog input values being sequentially input to said oversampled analog modulator to provide on the output of said digital filter first and second measured output values, respectively, said calibration means operable to compare said first and second measured values to expected first and second values, respectively, and calculate said dc offset value and said gain scaling factor, said dc offset and said gain scaling factor stored at the storage means as said digital calibration parameters.

11. The analog-to-digital converter of claim 10 and further comprising means for operating the analog-to-digital converter in said calibration mode in response to an external signal wherein said output compensation means is prohibited from operating in the compensation mode.

12. The analog-to-digital converter of claim 10 wherein said oversampled analog modulator comprises:

a delta-sigma analog modulator for outputting a string of digital pulses; and

said digital filter for filtering noise out of said string of digital pulses and outputting a digital value therefrom.

13. The analog-to-digital converter of claim 10 wherein said output compensation means comprises:

means for offsetting by said dc offset value the digital value output by said digital filter to provide an offset compensated value; and

means for multiplying said offset compensated value by said gain scaling factor.

14. The analog-to-digital converter of claim 10 wherein said first predetermined analog input value comprises a zero-scale value and said second predetermined analog input value comprises a full-scale value, wherein said calibration means is operable to calculate said dc offset value utilizing said zero-scale value and said calibration means is operable to calculate said gain scale factor by utilizing said calculated dc offset value and said full-scale value.

15. The analog-to-digital converter of claim 14 wherein said calibration means comprises:

means for receiving the output of said digital filter;

multiplexer means for selecting between an analog input, said full-scale value, and said zero-scale value;

offset means for comparing said measured output value from said digital filter with said first expected value and determining the difference therebetween when said zero-scale value is selected by said multiplexer means, said offset means calculating said dc offset value to provide compensation for the difference;

gain scaling means for subtracting said calculated dc offset value from said measured output value when said full-scale value is selected by said multiplexing means to provide an offset compensated value and comparing said offset compensated value with said second expected value to determine the difference therebetween and calculating said gain scaling factor to provide compensation for the difference; and

storing said offset and said gain scale factor in said storage means.

16. The analog-to-digital converter of claim 15 wherein the combination of said analog modulator and said digital filter has a finite response time and further comprising:

means for delaying operation of said offset means by a predetermined delay time after said zero-scale value is selected by said multiplexer means; and

means for delaying said gain scaling means for said predetermined delay time after selection of said full-scale value by said multiplexing means, said predetermined duration of time providing sufficient time for said digital filter to settle.

17. The analog-to-digital converter of claim 15 wherein said output compensation means comprises:

means for accessing said storage means to fetch said dc offset value and said gain scaling factor therefrom;

means for subtracting said dc offset value from the digital value output by said conversion means to provide an offset compensated value; and

means for multiplying said offset compensated value by said gain scaling factor to provide an output compensated value, said output compensated value output from the analog-to-digital converter.

18. The analog-to-digital converter of claim 10 wherein the compensated digital value output by said output compensation means comprises a digital value having a first resolution and further comprising means for digitally truncating the number of bits in the compensated digital value output by said compensation means to decrease the resolution thereof for output from the analog-to-digital converter such that said output compensation means and said conversion means operate on a higher resolution than the digital value output by the analog-to-digital converter.

19. The analog-to-digital converter of claim 10 wherein the combination of said oversampled analog modulator and said digital filter has a substantially linear response.

20. The analog-to-digital converter of claim 10 wherein said calibration means comprises:

first receiving means for receiving the output of said digital filter after a first predetermined delay in response to receiving a first external control signal, said first external control signal indicating the presence of said first predetermined analog value on the input of said oversampled analog modulator;

offset means for comparing said receiving output received by said first receiving means with said first expected value and calculating said dc offset value;

second receiving means for receiving the output of said digital filter after a second predetermined delay in response to receiving a second external control signal, said second external control signal indicating the presence of said second predetermined analog value on the input of said oversampled analog modulator;

gain scaling means for substracting said dc offset value from said received output from said receiving means to provide an offset compensated value and comparing said offset compensated value with said second expected value to determine the difference therebetween and calculating said gain scaling factor to provide compensation for the difference; and

storing said calculated dc offset value and said calculated gain scaling factor in said storage means.

21. The analog-to-digital converter of claim 20 wherein said digital signal processor has a predetermined digital resolution and further comprising means for truncating the output of said compensation means by a predetermined value such that the output therefrom has a lower resolution than said digital signal processor wherein said digital signal processor operates at a higher resolution than the resolution of the value output by said truncating means.

22. A self-calibrating analog-to-digital converter, comprising:

an oversampled analog modulator for receiving an analog input signal and converting it to a digital output having a value proportional to said analog input signal;

a digital signal processor for receiving the output of said analog modulator and operable to perform multiplication, addition and/or subtraction thereon in accordance with predetermined processing algorithms;

filter means for controlling said digital signal processor to execute a predetermined filter algorithm to filter the output of said oversampled analog modulator in the digital domain and output a digital value;

mode control means to operate the analog-to-digital converter in a normal mode or in a calibration model;

storage means for storing calibration parameters;

compensation means operable in the normal mode for controlling said digital signal processor to compensate the digital output value generated by said digital signal processor after execution of said filter algorithm in accordance with a predetermined compensation algorithm utilizing said calibration parameters;

input means operable in said calibration mode for inputting predetermined analog calibration signals into said oversampled analog modulator and operable in the normal mode to input said analog signal to said oversampled analog modulator; and

calibration means operable in the calibration mode for controlling said digital signal processor to compare the output of said digital signal processor with predetermined expected values after receipt of said predetermined analog calibration signals by said oversampled analog modulator and execution of said filter function thereon and calculate said calibration parameters in accordance with a predetermined calibration algorithm.

23. The analog-to-digital converter of claim 22 wherein said analog modulator oversampled comprises a delta-sigma modulator.

24. The analog-to-digital converter of claim 22 wherein said compensation algorithm comprises:

means for determining a dc offset value and a gain scaling factor after comparison of the output of said digital signal processor with said predetermined expected values, said dc offset value and said gain scaling factor comprising said calibration parameters; and

said compensation algorithm comprises an offset of the measured value output by said digital signal processor after execution of said filter algorithm by said dc offset value to provide an offset compensated value followed by a multiplication of said offset compensated value by said gain scaling factor to provide a compensated output.

25. The analog-to-digital converter of claim 24 wherein said predetermined analog inputs comprise a zero-scale value and a full-scale value and said calibration means comprises:

means for controlling said digital signal processor to compare the results of said filter algorithm with a first expected result after receipt by said analog modulator of said zero-scale value and determine the difference therebetween, said difference constituting said dc offset value;

means for controlling said digital signal processor to subtract said offset value from the result of said filter algorithm to provide an offset value compensated after receipt by said analog modulator of said full-scale value, said digital signal processor controlled to compare said offset compensated value with a second expected result and calculate said gain scaling factor from the difference therebetween; and

means for storing said dc offset value and said gain scaling factor in said storage means.

26. The analog-to-digital converter of claim 25 and further comprising delay means for inhibiting said calibration means from calculating said dc offset value for a predetermined delay after receipt of said zero-scale value, and inhibiting calculation of said offset compensated value for said predetermined duration of time after receipt of said full-scale value to allow said analog modulator oversampled and said digital signal processor to settle, said analog modulator oversampled and said digital signal processor having a finite response time.

27. The analog-to-digital converter of claim 25 wherein said input means comprises a multiplexer having an input thereof connected to said zero-scale value, an input thereof connected to said full-scale value and an input thereof connected to said analog input signal, said multiplexer operable in the normal mode to select said analog input signal and in the calibration mode to select either said full-scale value or said zero-scale value in accordance with said calibration algorithm.

28. A method for converting an analog input to a compensated digital output with internal calibration, comprising:

providing an oversampled analog modulator;

receiving an analog input signal on the input to the oversampled analog modulator and filtering the output of the oversampled analog modulator with a digital filter to an uncompensated digital output having a digital value proportional to the analog input signal;

storing digital calibration parameters containing a dc offset value and a gain scaling factor;

operating in either a normal compensation mode or a calibration mode;

digitally compensating the uncompensated digital output in the normal compensation mode to provide the compensated digital output with dc offset and gain compensation in accordance with a predetermined compensation algorithm that is a function of the stored digital calibration parameters;

generating the calibration parameters by receiving the uncompensated digital output when in the calibration mode in response to first and second predetermined analog input values being sequentially input as the analog input signal to provide on the uncalibrated digital output first and second output values, respectively;

comparing the first and second output values to expected first and second values, respectively; and

calculating the dc offset value and the gain scaling factor for storage as the digital calibration parameters.

29. The method of claim 28 wherein the step of converting the analog input signal to an uncompensated digital output signal comprises inputting the analog input signal to a delta-sigma analog modulator and filtering the output thereof with a digital filter.

30. The method of claim 28 wherein the step of compensating the output comprises:

offsetting the uncompensated digital output by the offset value to provide an offset compensated value; and

multiplying the offset compensated value by the gain scaling factor.

31. The method of claim 28 wherein the first predetermined analog input value comprises a zero-scale value and the second predetermined analog input value comprises a full-scale value, wherein the step of generating the calibration parameters comprises calculating the dc offset value utilizing the zero-scale value and then calculating the gain scaling factor by utilizing the calculated dc offset value and the full-scale value.

32. The method of claim 28 wherein the step of calculating the dc offset value and calculating of the gain scaling factor comprises delaying calculation of the dc offset value and the gain scaling factor for a predetermined amount of time after input of each of the first and second predetermined analog input values.

33. The method of claim 28 wherein the step of compensating the output comprises:

accessing the stored dc offset value and the gain scaling factor;

subtracting the dc offset value from the uncompensated digital output to provide an offset compensated value; and

multiplying the offset compensated value by the gain scaling factor to provide an output compensation value.

34. The method of claim 28 wherein the compensated digital value comprises a digital value having a first resolution and further comprising truncating the number of bits in the compensated digital value to decrease the resolution thereof such that the step of compensation and the step of calibration is carried out at a higher resolution than the resolution of the actual output compensated value.