Thin film semiconductor device and method of fabricating the same

• US 4,943,837 A
• Filed: 03/10/1988
• Issued: 07/24/1990
• Est. Priority Date: 03/11/1987
• Status: Expired due to Term

• Current Assignee: Hitachi, Ltd.
• Original Assignee: Hitachi, Ltd.
• Inventors: Miyata, Kenji, Ono, Kikuo, Suzuki, Takaya, Konishi, Nobutake
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): Limanek, Robert P.
• Application Number:
  US07/166,518
• Time in Patent Office: 866 Days
• Field of Search: 357/23.7, 357/64, 437/937, 437/21
• US Class Current: 257/57
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78666 with normal-type structure, e.g. with top gate
• CPC Class Codes: Y10S 438/958 Passivation layer

Abstract

A thin film transistor and a method of fabricating the transistor are disclosed. The gate electrode of this thin film transistor is made small in thickness so that active hydrogen for hydrogenating passivation can penetrate in a surface layer of channel region having substantially uniform thickness, through the gate electrode. Thus, hydrogenation can be effectively carried out for the thin film transistor, independently of the length of a channel formed in the transistor.

Claims

1. A thin film semiconductor device which includes a silicon layer formed on an insulating substrate and made of one of amorphous silicon and polycrystalline silicon, a gate electrode formed over the silicon layer through an insulating film and made of one of amorphous silicon and polycrystalline silicon, source and drain regions formed in the silicon layer so that the projection of the gate electrode onto the silicon layer is interposed between the source and drain regions, a channel region beneath the gate electrode and the insulating film, and source and drain electrodes kept in ohmic contact with the source and drain regions, respectively, wherein the thickness of the gate electrode is made less than or equal to 1,500 Å

, whereby an active element for passivation can penetrate through the gate electrode into a surface layer of the entire channel region, which surface layer has a substantially uniform thickness, so that a passivated surface layer of the channel region, having a substantially uniform thickness for the entire channel region, can be achieved, and wherein the device further includes said passivated surface layer, having said active element for passivation therein so as to provide said passivated surface layer, having the substantially uniform thickness, for the entire channel region.

2. A thin film semiconductor device according to claim 1, wherein the active element penetrates through the gate electrode into that surface layer, of the channel region, which has a thickness of 300 Å

or more.

3. A thin film semiconductor device according to claim 1, wherein the source and drain regions are formed on the insulating substrate.

4. A thin film semiconductor device according to claim 1, wherein the source and drain electrodes are formed on the silicon layer.

5. A thin film semiconductor device according to claim 1, wherein the insulating film is a silicon oxide film.

6. A thin film semiconductor device according to claim 1, wherein the thickness of the gate electrode is greater than or equal to 100 Å

, and less than or equal to 1,500 Å

.

7. A thin film semiconductor device according to claim 1, wherein said channel region is provided in said silicon layer, between said source and drain regions.

8. A thin film semiconductor device according to claim 1, wherein said silicon layer having the source and drain regions formed therein includes first and second parts, respectively, having the source region and the drain region formed therein, the first and second parts being spaced from each other, and wherein said channel region is formed in a further silicon layer, the further silicon layer being formed on and between the first and second parts of the silicon layer.

9. A thin film semiconductor device according to claim 1, wherein said active element for passivation is hydrogen, the passivation being a plasma hydrogenating passivation.

10. A thin film semiconductor device which includes a silicon layer formed on an insulating substrate and made of one of amorphous silicon and polycrystalline silicon, a gate electrode formed over the silicon layer through an insulating film and made of one of amorphous silicon and polycrystalline silicon, source and drain regions formed in the silicon layer so that the projection of the gate electrode onto the silicon layer is interposed between the source and drain regions, a channel region beneath the gate electrode and the insulating film, the length of the channel region beneath the gate electrode being greater than or equal to 10 μ

m, and source and drain electrodes kept in ohmic contact with the source and drain regions, respectively, wherein the thickness of the gate electrode is made less than or equal to 1,500 Å

, whereby an active element for passivation can penetrate through the gate electrode into a surface layer of the entire channel region, which surface layer has a substantially uniform thickness, so that a passivated surface layer of the channel region, having a substantially uniform thickness for the entire channel region, can be achieved, and wherein the device further includes said passivated surface layer, having said active element for passivation therein so as to provide said passivated surface layer, having the substantially uniform thickness, for the entire channel region.

11. A thin film semiconductor device according to claim 10, wherein the channel region, having a length beneath the gate electrode greater than or equal to 10 μ

m, is in the silicon layer.