Parallel processor-based raster graphics system architecture

• US 4,949,280 A
• Filed: 05/10/1988
• Issued: 08/14/1990
• Est. Priority Date: 05/10/1988
• Status: Expired due to Fees

• Current Assignee: Battelle Memorial Institute
• Original Assignee: Battelle Memorial Institute
• Inventors: Littlefield, Richard J.
• Primary Examiner(s): Harkcom, Gary V.
• Assistant Examiner(s): Zimmerman, Mark K.
• Application Number:
  US07/192,218
• Time in Patent Office: 826 Days
• Field of Search: 364/518, 364/521, 364/131, 364/133, 364/134, 364/200 MS File, 364/900 MS File, 370/60, 370/68, 370/89
• US Class Current: 345/505
• CPC Class Codes: G09G 5/393 Arrangements for updating the contents of the bit-mapped memory

Abstract

An apparatus for generating raster graphics images from the graphics command stream includes a plurality of graphics processors connected in parallel, each adapted to receive any part of the graphics command stream for processing the command stream part into pixel data. The apparatus also includes a frame buffer for mapping the pixel data to pixel locations and an interconnection network for interconnecting the graphics processors to the frame buffer. Through the interconnection network, each graphics processor may access any part of the frame buffer concurrently with another graphics processor accessing any other part of the frame buffer. The plurality of graphics processors can thereby transmit concurrently pixel data to pixel locations in the frame buffer.

Claims

1. Apparatus for generating raster graphics images from a graphics command stream, comprising:

a plurality of graphics processing means each adapted to receive any part of the graphics command stream for processing the command stream part into pixel data;

frame buffer means for mapping the pixel data to pixel locations; and

a unidirectional interconnection network having multiple levels of linked nodes to provide a data path from each graphics processing means to any part of the frame buffer means, each node at one level including means for queuing at the node pixel data intended for a part of the frame buffer until a link is available from the node to a node at another level.

2. The apparatus of claim 1 including interface means for dividing the graphics command stream into parts comprising primitives, the interface means directing each primitive to a graphics processing means available for processing the primitive into the pixel data.

3. The apparatus of claim 1 in which the interconnection network comprises a packet switching network and the graphics processing means are adapted to transmit the pixel data in an addressed data packet to the network for routing to the addressed part of the frame buffer means.

4. Apparatus for generating raster graphics images from a graphics command stream, comprising:

a plurality of graphics processing means, each adapted to receive any part of the graphics command stream for processing the part into pixel data;

interface means for dividing the graphics command stream into parts comprising primitives and for directing each primitive to a graphics processing means available for processing the primitive into the pixel data;

frame buffer means for mapping pixel data to pixel locations; and

a unidirectional interconnection network for enabling each graphics processing means to access any part of the frame buffer to transmit pixel data to any pixel location in the buffer.

5. The apparatus of claim 4 in which each graphics processing means comprises a separate graphics processor.

6. The apparatus of claim 4 in which the graphics command stream originates from a host and the interface means comprises a demultiplexor between the host and plurality of graphics processing means.

7. The apparatus of claim 4 in which the graphics command stream originates from a host and the interface means comprises a priority arbitration network between the host and the plurality of graphics processing means to parcel out primitives to the processing means on a first-free basis.

8. The apparatus of claim 4 in which the graphics command stream originates from a multiprocessor host and the interface means comprises an interconnection network between the host and the plurality of graphics processing means.

9. The apparatus of claim 4 in which the interconnection network comprises a plurality of linked nodes, each of which includes:

a pair of shift registers, each register receiving packets of pixel data and transmitting the packets to a linked node;

a pair of multiplexors, each multiplexor connected to a shift register and a pair of input ports that provide the packets of pixel data;

routing arbitration logic for controlling the multiplexors, the arbitration logic reading packets at each input port to determine which shift register is to receive the packet; and

flag means for alerting the node to queue the received packet in the shift register until the linked node is ready to receive a transmission from the register.

10. In a raster graphics system, a method for generating raster graphics images from a graphics command stream, comprising:

dividing the graphics command stream into primitives;

processing the primitives through a plurality of graphics processors concurrently into pixel data having addresses in a frame buffer, each primitive being directed to an available graphics processor;

transmitting the pixel data concurrently to addressed parts of the frame buffer; and

reading the frame parts in interleaved fashion to generate raster graphics images.