Memory cartridge having a multi-memory controller with memory bank switching capabilities and data processing apparatus

• US 4,949,298 A
• Filed: 11/12/1987
• Issued: 08/14/1990
• Est. Priority Date: 11/19/1986
• Status: Expired due to Term

• Current Assignee: Nintendo Company Limited
• Original Assignee: Nintendo Company Limited
• Inventors: Nakagawa, Katsuya, Nakanishi, Yoshiaki
• Primary Examiner(s): Zache, Raulfe B.
• Application Number:
  US07/119,551
• Time in Patent Office: 1,006 Days
• Field of Search: 365/230.03, 364/200 MS File, 364/900 MS File
• US Class Current: 711/2
• CPC Class Codes: A63F 13/95 Storage media specially adapted for storing game information, e.g. video game cartridges
• CPC Class Codes: A63F 2300/206 Game information storage, e.g. cartridges, CD ROM's, DVD's, smart cards
• CPC Class Codes: G06F 12/06 Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication G06F12/08 takes precedence
• CPC Class Codes: G06F 12/0623 for memory modules
• CPC Class Codes: G11C 5/025 Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device geometrical lay-out of the components in integrated circuits, H01L27/0207
• CPC Class Codes: G11C 7/1078 Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
• CPC Class Codes: G11C 7/1087 Data input latches
• CPC Class Codes: G11C 7/1093 Input synchronization
• CPC Class Codes: G11C 8/12 Group selection circuits, e.g. for memory block selection, chip selection, array selection
• CPC Class Codes: H05K 5/0256 of interchangeable modules or receptacles therefor, e.g. cartridge mechanisms
• CPC Class Codes: H05K 5/026 having standardized interfaces flash memory cards G06K19/077

Abstract

A memory cartridge having a case and a printed circuit board housed in the case is connected, in use, to a data processing unit including a microprocessor and a picture processing unit. A memory cooperating with the data processing unit is installed on the printed circuit board, and an area of the memory is divided into a plurality of banks. A multi-memory controller installed on the printed circuit board includes a plurality of registers into which microprocessor generated data, representing bank switching conditions, are loaded. An address for switching the memory banks is output in response to the content of at least one of a plurality of registers. Thus, by changing the above-described data, the microprocessor can specify a specific bank at a specific time and utilize that bank.

Claims

1. A memory cartridge which is removably connectable to a data processing unit that includes a microprocessor and a picture processing unit coupled to said microprocessor, said memory cartridge being loaded in said data processing unit when in use, said memory cartridge comprising:

a printed circuit board which is connected to said data processing unit when loaded therein,

at least one memory which is installed on said printed circuit board and whose memory area is divided into a plurality of banks, said at least one memory being coupled to said microprocessor and said picture processing unit when said memory cartridge is loaded in said data processing unit, and

memory controlling means which is installed on said printed circuit board, for receiving data representing bank switching conditions from said microprocessor, and for sending bank specifying address data for specifying a bank to said at least one memory, said memory controlling means including a plurality of registers into which said data from said microprocessor are loaded and address generating means for generating said bank specifying address data based on data from at least one of said plurality of registers.

2. A memory cartridge in accordance with claim 1, wherein said memory controlling means includes an additional register into which said data from said microprocessor can be stored temporarily and data loading means for selectively loading data in any one of said plurality of registers in response to said data from said microprocessor stored in said additional register.

3. A memory cartridge in accordance with claim 2, wherein said at least one memory includes a plurality of memory areas, and said address generating means includes a plurality of address generating means which respectively output an address for bank switching for one of said plurality of memory areas in response to data loaded in at least one of said plurality of registers.

4. A memory cartridge in accordance with claim 3, wherein said at least one memory includes a plurality of memories and wherein each memory area is formed on a different memory.

5. A memory cartridge in accordance with claim 3, wherein said plurality of memory areas are formed in different areas of one memory.

6. A memory cartridge in accordance with claim 1, wherein said data processing unit, a video memory which is accessed by said picture processing unit and a video monitor for displaying an image on a screen thereof based on data from said picture processing unit, and

said memory controlling means includes area specifying means for generating address data specifying a memory area of said video memory accessible by said picture processing unit based on data from said microprocessor.

7. A memory cartridge in accordance with claim 6, wherein an address space for said video memory corresponds to a first plurality of screens of said video monitor, and a real address of said video memory can access locations corresponding to a second plurality of screens less than said first plurality of screens,

said area specifying means includes signal outputting means for outputting a signal controlling the assignment of said memory area of said video memory to a predetermined portion of said address space, whereby a vertical scrolling or a horizontal scrolling occurs on the screen of said video monitor.

8. A memory cartridge in accordance with claim 6, wherein said at least one memory includes a program memory for storing a picture processing program and a character memory for storing character data used for picture processing, and

said memory controlling means includes a program bank controlling means for generating address data for bank switching of said program memory based on said data from said microprocessor and a character bank controlling means for generating an address for bank switching of said character memory based on said data from said microprocessor.

9. A memory cartridge according to claim 6, wherein said area specifying means includes means responsive to predetermined address information from said picture processing unit for generating at least a portion of an address for said video memory.

10. A memory cartridge according to claim 6, wherein said area specifying means includes means responsive to predetermined address information from said picture processing unit for generating address information indicative of the type of scrolling operation to be performed.

11. A memory cartridge according to claim 1, wherein said at least one memory comprises a program memory coupled to said memory controlling means and a character memory coupled to said memory controlling means.

12. A memory cartridge according to claim 11, wherein said address generating means includes a character bank control means for generating bank address information for bank switching in said character memory and program bank control means for generating bank address information for bank switching in said program memory.

13. A memory cartridge according to claim 1, wherein said at least one memory includes a program memory coupled to said memory controlling means and an expanded memory module coupled to said program memory and said memory controlling means.

14. A memory cartridge according to claim 13 further including a power supply coupled to said expanded memory module.

15. A memory cartridge according to claim 1, wherein said memory controlling means receives address information from said picture processing unit and said microprocessor.

16. A memory cartridge according to claim 1, wherein said memory controlling means includes an input for receiving a clock signal from said data processing unit.

17. A memory cartridge according to claim 16, wherein said memory cartridge includes an expansion memory and said memory controlling means includes input means for receiving predetermined address information from said microprocessor, and gating means responsive to said clock signal and said predetermined address information for enabling said expansion memory.

18. A memory cartridge according to claim 1, wherein said memory controlling means includes a control register which receives said data representing bank switching conditions from said microprocessor and a decoder coupled to said control register, said decoder being responsive to data stored in a predetermined portion of said control register for selecting one of said plurality of registers for receipt of bank switching related data stored in said control register.

19. A memory cartridge according to claim 18, wherein said control register includes a first data storage portion corresponding to said predetermined portion and a second data storage portion, said decoder being responsive to said first data portion for generating a data set signal, each of said plurality of registers being operable upon receipt of said data set signal to receive data stored in said second data storage portion of said control register.

20. A memory cartridge according to claim 1, wherein said at least one memory includes a program memory and a character memory, and wherein said program memory is in the address space of the microprocessor and is directly addressable by said microprocessor, and wherein said character memory is in the address space of the picture processing unit and is directly addressable by said picture processing unit.

21. A memory cartridge according to claim 1, wherein said at least one memory includes a program memory and an expansion memory wherein said address generating means includes program bank control means for selectively enabling said expansion memory and for addressing said program memory.

22. A memory cartridge according to claim 1, wherein said memory controlling means includes means for changing the number of bits in a bank.

23. A memory cartridge according to claim 22, wherein said means for changing is responsive to at least one predetermined bit in one of said plurality of registers.

24. A gaming apparatus, comprising:

a gaming machine including a microprocessor, a picture processing unit for image processing coupled to said microprocessor, a video memory accessed by said picture processing unit and a video monitor for displaying an image on a screen thereof based on data from said picture processing unit,

a memory cartridge which is removably connectable to said gaming machine and which, in use, is loaded in said gaming machine, wherein said memory cartridge includes a program memory for storing a program for a game and a character memory for storing character data for said game, said program memory having at least one memory area which is divided into a plurality of banks, and

memory controlling means which is installed in said memory cartridge, for receiving data representing bank switching conditions sent from said microprocessor, and for sending at least a predetermined portion of an address for specifying a bank to said program memory, wherein said microprocessor specifies a bank of said program memory, and displays a game image on said screen of said video monitor based on program data stored in the specified bank and character data stored in said character memory.

25. A gaming apparatus in accordance with claim 24, wherein said character memory is divided into a plurality of banks, and said memory controlling means includes character bank controlling means for generating an address for bank switching of said character memory based on data from said microprocessor.

26. A gaming apparatus in accordance with claim 25, wherein an address space for said video memory corresponds to a first plurality of screens of said video monitor, and a real address of said video memory can access locations corresponding to a second plurality of screens less than said first plurality of screens,

said memory controlling means includes area specifying means for specifying a memory area of said video memory accessible by said picture processing unit and including signal outputting means for outputting a signal controlling the assignment of said memory area of said video memory to a certain portion of said address space, whereby a vertical scrolling or a horizontal scrolling operation occurs on the screen video monitor.

27. A gaming apparatus according to claim 24, wherein said memory controlling means includes a control register, and a plurality of additional registers, said control register receiving said data representing bank switching conditions from said microprocessor, said memory controlling means further including a decoder coupled to said control register, said decoder being responsive to data stored in a predetermined portion of said control register for selecting one of said plurality of registers for receipt of bank switching related data stored in said control register.

28. A gaming apparatus according to claim 24, wherein said memory controlling means includes character bank control means for generating bank address information for bank switching in said character memory and program bank control means for generating bank address information for bank switching in said program memory.

29. A gaming apparatus according to claim 24, wherein said memory cartridge further includes an expansion memory and said memory controlling means includes program bank control means for selectively enabling said expansion memory and for addressing said program memory.