Method of photoelectric detection with reduction of remanence of a phototransistor, notably of the NIPIN type

• US 4,952,788 A
• Filed: 10/06/1989
• Issued: 08/28/1990
• Est. Priority Date: 10/14/1988
• Status: Expired due to Term

• Current Assignee: Thomson-CSF (Thales SA)
• Original Assignee: Thomson-CSF (Thales SA)
• Inventors: Arques, Marc, Berger, Jean L.
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): Beck, George C.
• Application Number:
  US07/418,186
• Time in Patent Office: 326 Days
• Field of Search: 250/208.1, 250/578.1, 357/30 H, 357/24 LR, 358/213.15, 358/213.16, 358/213.26, 358/213.29
• US Class Current: 250/208.1
• CPC Class Codes: H01L 27/14665 Imagers using a photoconductor layer
• CPC Class Codes: H01L 27/14681 Bipolar transistor imagers
• CPC Class Codes: H04N 25/626 Reduction of noise due to residual charges remaining after image readout, e.g. to remove ghost images or afterimages
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells

Abstract

The disclosure concerns photosensitive matrices, and especially those using NIPIN or PINIP type phototransistors made of amorphous silicon. To prevent problems of remanence, due to the collecting of holes in the base after an illumination stage, it is proposed to follow the step for reading the illumination signal by a remanence erasure step in which the phototransistor is made conductive in forward or reverse bias, so as to inject, into the base, electrons which will eliminate the holes by recombination. Switching on by reverse bias proves to be more efficient than switiching on by forward bias. The invention is applicable notably to a matrix structure of rows and columns of photosensitive sites in which each site is formed by a NIPIN transistor made of amorphous silicon in series with a reading diode that may be put into reverse conduction.

Claims

1. A method of photoelectric detection wherein there is used, as a detection element, a phototransistor connected between a first electrode and a floating node, with a switch-over element connected between the floating node and a second electrode, the method including a detection step in which the phototransistor is biased in non-conductive mode and photoelectric charges generated in the phototransistor are stored at the floating node, and a reading step during which the switch-over element is made conductive and the stored charges are removed, a method wherein, after the reading step, a step is executed for the erasure of remanence, consisting in turning the phototransistor on.

2. A method according to claim 1, wherein the phototransistor is a non-connected base transistor, and its being made conductive during the remanence erasure step is achieved by the application of a high voltage pulse between the collector and the emitter.

3. A method according to claim 2, wherein the voltage pulse is applied in forward bias, injecting charges from the emitter to the base.

4. A method according to claim 2, wherein the voltage pulse is applied in reverse bias, injecting charges from the collector to the base, the bias being high enough to make the transistor go beyond a reverse conduction threshold.

5. A method according to claim 4, wherein the reverse bias voltage during the erasure of the remanence is close to the reverse conduction threshold voltage of the phototransistor.

6. A method according to claim 1, wherein the phototransistor is a PINIP or NIPIN phototransistor made of amorphous silicon with five superimposed layers.

7. A method for the erasure of the remanence of a photosensitive matrix, each photosensitive dot of which comprises a phototransistor as a photosensitive element and a reading diode, placed in series with the latter between a row conductor and a column conductor of the matrix, the reading diode and the phototransistor being capable of being placed in reverse conduction, wherein:

first of all, an idle voltage level is applied to the row conductor during a stage of integration of charges due to the illumination;

then a voltage pulse, called a reading pulse, is applied, said reading pulse having a first sign with respect to the idle level;

then a voltage pulse of the opposite sign is applied, this voltage pulse being called a remanence erasure pulse, the potential difference between the level of this pulse and the potential of the column conductor being greater in terms of absolute value than the sum of the reverse conduction thresholds of the phototransistor and of the reading diode.

8. A method according to claim 7, wherein the potential difference between the level of the erasure pulse and the potential of the column conductor is close to the sum of the reverse conduction thresholds of the reading diode and of the phototransistor.

9. A method according to claim 7, wherein the erasure pulse is followed by a resetting pulse, with an amplitude that is sufficient to place the reading diode again under forward conduction.

10. A method according to claim 7, wherein the reading pulses are applied successively to the different rows of the matrix, and wherein the remanence erasure pulses are applied simultaneously for all the rows, a time interval being planned between the end of the reading pulse and the start of the remanence erasure pulse.

11. A method according to claim 7, 10, wherein the reading diode is made in the form of a non-connected base transistor of the NIPIN or PINIP type, placed in series and in the same direction as the phototransistor.