Low-power RF receiver
First Claim
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1. A low-power RF receiver, comprising:
- a battery;
at least two antenna circuits, tuned to a predetermined reception frequency;
at least two comparators, each having a respective pair of inputs directly connected to receive a low-level analog signal at said predetermined frequency from a respective one of said antenna circuits;
at least one digital logic stage, connected to be driven by the output of a selected one of said comparators and to provide a full digital output corresponding to the voltage received at said selected comparator;
said comparators and said logic stage being connected to be powered by said battery.
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Abstract
A RF receiver with extremely low standby power consumption. To minimize power consumption during standby, the analog input from the antenna circuit (including tank resonator) is connected directly to the inputs of a comparator.
Preferably two comparators are used, each connected to a separate antenna. Thus, a signal loss due to antenna nulls will be minimized.
Preferably a following stage decodes a pulse-width-modulated (or burst-length-modulated) signal. If the length of pulses substantially exceeds the expected maximum, the following stage provides a control signal to reduce the gain of the input comparators.
126 Citations
12 Claims
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1. A low-power RF receiver, comprising:
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a battery; at least two antenna circuits, tuned to a predetermined reception frequency; at least two comparators, each having a respective pair of inputs directly connected to receive a low-level analog signal at said predetermined frequency from a respective one of said antenna circuits; at least one digital logic stage, connected to be driven by the output of a selected one of said comparators and to provide a full digital output corresponding to the voltage received at said selected comparator; said comparators and said logic stage being connected to be powered by said battery. - View Dependent Claims (2, 3, 4, 5)
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6. A low-power RF receiver, comprising:
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a battery; at least one antenna circuit, tuned to at least one predetermined reception frequency; at least one comparator, having a pair of inputs directly connected to receive a low-level analog signal at said predetermined frequency from said antenna circuit, wherein said comparator receives a standby current which is regulated by a current source, and wherein said current source comprises multiple current-source devices in parallel, and switching transistors which are connected in series with individual ones of said current-source devices, to enable or disable ones of said current-source devices; current-source-control logic, connected to control said switching transistors, and thereby enable or disable ones of said current-source devices, in accordance with signal detection characteristics seen at a later stage; and at least one digital logic stage, connected to be driven by the output of said comparator and provide a full digital output corresponding to the voltage received at said comparator; said comparator and said logic stage being connected to be powered by said battery. - View Dependent Claims (7, 8, 9, 10, 11, 12)
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Specification