Integrated telecommunication system with improved digital voice response
First Claim
1. An integrated telecommunication system for multiple telephone line response and processing comprising:
- a plurality of interface processor circuits, each of which is adapted to control the physical connection to a plurality of telephone line channels and control communication on a group of said telephone line channels connected thereto. each said interface circuit including a high speed interface control microprocessor and a first data storage associated therewith,a plurality of signal processor circuit means, each said signal processor circuit means including crosspoint switch means for receiving multiple line mutiple channel inputs and producing corresponding multiple line multiple channel outputs, and a high speed digital signal microprocessor for analyzing the incoming signals and compressing the data therein, and a second data storage associated therewith, for controlling one or more telecommunication function circuits,a main system control microprocessor,a first bus system for connecting said plurality of interface processor circuits to said plurality of signal processor circuit means, anda second bus system for connecting each of said plurality of interface processor circuits to each of said plurality of signal processor circuit means and to said main system control microprocessor,whereby the high speed processing requirements of each said group of telephone lines is performed by said interface processor circuits and said digital signal microprocessor and said main system control microprocessor controls the storage of data in said first and second data storages and intercommunication functions between said plurality of interface processor circuits and said plurality of signal processor circuit means and said one or more telecommunication function circuits controlled thereby.
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Accused Products
Abstract
An integrated telecommunication system for multiple telephone line response and processing having a plurality of interface circuits, each of which is adapted to control the physical connection to a plurality of telephone line channels, control communication on a group of telephone line channels connected thereto. Each interface circuit includes a high speed interface microprocessor and a first data storage associated therewith. A first bus system interconnects the plurality of interface processor circuits to signal processor circuits. Each signal processor module includes a cross-point switch and a high speed digital signal microprocessor for analyzing the incoming signals and compressing the data therein, a second data storage associated therewith, and one or more of a plurality of telecommunication function circuits controlled thereby. A multi-bus system connects each of the plurality of interface processors to each of the plurality of signal processor circuits and to a main system control processor and a third data storage. The high speed processing requirements of each group of telephone lines is performed by the respective interface control processor and a digital signal microprocessor and main system control processor selectively controls the storage of data in the first, second and third data storages and intercommunication functions between the plurality of interface processor circuits and the plurality of signal processor circuits and the function circuits controlled thereby.
50 Citations
5 Claims
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1. An integrated telecommunication system for multiple telephone line response and processing comprising:
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a plurality of interface processor circuits, each of which is adapted to control the physical connection to a plurality of telephone line channels and control communication on a group of said telephone line channels connected thereto. each said interface circuit including a high speed interface control microprocessor and a first data storage associated therewith, a plurality of signal processor circuit means, each said signal processor circuit means including crosspoint switch means for receiving multiple line mutiple channel inputs and producing corresponding multiple line multiple channel outputs, and a high speed digital signal microprocessor for analyzing the incoming signals and compressing the data therein, and a second data storage associated therewith, for controlling one or more telecommunication function circuits, a main system control microprocessor, a first bus system for connecting said plurality of interface processor circuits to said plurality of signal processor circuit means, and a second bus system for connecting each of said plurality of interface processor circuits to each of said plurality of signal processor circuit means and to said main system control microprocessor, whereby the high speed processing requirements of each said group of telephone lines is performed by said interface processor circuits and said digital signal microprocessor and said main system control microprocessor controls the storage of data in said first and second data storages and intercommunication functions between said plurality of interface processor circuits and said plurality of signal processor circuit means and said one or more telecommunication function circuits controlled thereby. - View Dependent Claims (2, 3)
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4. An integrated telecommunication system for multiple telephone line response and processing comprising:
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a plurality of interface processor circuits, each of which is adapted to control the physical connection to a plurality of telephone line channels, and control communication on a group of said telephone line channels connected thereto, and each interface processor circuit including a high speed interface control microprocessor, respectively, a plurality of signal processor circuit means, each said signal processor circuit means including crosspoint switch means for receiving multiple line multiple channel inputs and producing corresponding multiple line multiple channel outputs, and a high speed digital signal microprocessor for analyzing the incoming signals and compressing the data therein, and one or more telecommunication function circuit means controlled thereby, a main system control microprocessor, and data storage means connected thereto, a first bus system for connecting said plurality of interface processor circuits to said plurality of signal processor circuit means, and a second bus system for connecting each of said plurality of interface processor circuits to each of said plurality of signal processor circuit means and to said main system control microprocessor, whereby the high speed processing requirements of said group of telephone line channels is performed by said interface processor circuits and said digital signal microprocessor and said main system control microprocessor controls the storage of data in said data storage means and intercommunication functions between said plurality of interface processor circuits and said plurality of signal processor circuit means and said telecommunication function circuit means controlled thereby. - View Dependent Claims (5)
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Specification