Bidirectional field effect semiconductor device and circuit

• US 4,961,100 A
• Filed: 06/20/1988
• Issued: 10/02/1990
• Est. Priority Date: 06/20/1988
• Status: Expired due to Term

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Chang, Hsueh-Rong, Baliga, Bantval J., Howell, Edward K.
• Primary Examiner(s): Hille, Rolf
• Assistant Examiner(s): FAHMY, WAEL M
• Application Number:
  US07/208,448
• Time in Patent Office: 834 Days
• Field of Search: 357/39, 357/38, 357/23.4, 357/22
• US Class Current: 257/172
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/7302 structurally associated with other devices assemblies of devices H01L25/00; integrated circuits H01L27/00; IGBT H01L29/7393
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/7827 Vertical transistors H01L29/7802, H01L29/78642 take precedence
• CPC Class Codes: H03K 17/06 Modifications for ensuring a fully conducting state
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors

Abstract

An insulated field effect semiconductor device having source and drain regions extending to opposed surfaces of its semiconductor body is bidirectional and capable of blocking voltages in either of two opposing polarities and comprises a four terminal device having source and drain electrodes disposed on the opposed surfaces and a base electrode all ohmically connected to corresponding portions of the semiconductor body. An insulated gate is provided in a trench which extends into the semiconductor body for controlling the conductivity of a channel region extending within the base region between the source and drain regions. The device is free of source-to-base and drain-to-base short circuits. Control circuits enable this device to conduct or block both polarities of a high current AC voltage applied across its source and drain terminals while preventing undesired avalanche breakdown within the device.

Claims

1. A field effect semiconductor device comprising:

a semiconductor body having first and second, opposed major surfaces including;

a first main terminal region of one conductivity type extending to said first major surface of said body,

a second main terminal region of said one conductivity type extending to said second main surface of said body, and

a base region of an opposite conductivity type disposed between and spacing apart said first and second main terminal regions and having a channel portion extending to said first surface of said semiconductor body;

an insulated gate electrode disposed on said first surface adjacent to said base region between said first and second main terminal regions for controlling the conductivity of said channel portion between said first and second main terminal regions for carriers of said one conductivity type;

a first main electrode disposed on said first major surface and ohmically connected to said first main terminal region;

a second main electrode disposed on said second major surface and ohmically connected to said second main terminal region; and

a base electrode ohmically connected to said base region; and

said device being free of first main terminal region-to-base region and second main terminal region-to-base region short circuits whereby said device is bidirectional and the conductivity of said channel region is determined by the potential of said insulated gate electrode relative to said base region.

2. The field effect semiconductor device recited in claim 1 wherein said second main terminal region includes first and second portions having two different one conductivity type doping levels, said first portion being disposed adjacent said second main electrode and having a relatively high doping concentration and being spaced from said base region by said second portion, said second portion having a relatively lower doping concentration than said first portion.

3. The field effect semiconductor device recited in claim 2 wherein said first main terminal region includes first and second portions having two different one conductivity type doping levels, said first portion being disposed adjacent said first main electrode and having a relatively high doping concentration and being spaced from said base region by said second portion, said second portion having a relatively lower doping concentration than said first portion.

4. The field effect semiconductor device recited in claim 1 wherein:

said semiconductor body includes a trench extending into said body from said second major surface thereof;

said insulated gate electrode is disposed in said trench; and

said channel portion of said base region is disposed adjacent to the walls of said trench.

5. The field effect semiconductor device recited in claim 1 wherein:

said semiconductor body includes a trench extending into said body from said first major surface, said trench extending through said base region to said second main region; and

said channel region is disposed adjacent the walls of said trench.

6. The field effect semiconductor device recited in claim 5 wherein:

the insulating layer of said insulated gate electrode is disposed on the surfaces of said trench; and

said insulating layer is thicker along the portion of said trench adjacent said second main terminal region than it is along the portion of said trench adjacent the base region.

7. A field effect semiconductor device comprising:

a semiconductor body having first and second opposed major surfaces and including;

a first main terminal region of one conductivity type extending to said first surface,

a second main terminal region of said one conductivity type extending to said second surface, and

a base region of an opposite conductivity type disposed between and spacing apart said first and second main terminal regions, and a trench extending into said body from said first major surface through said first main terminal and base regions to said second main terminal region, said base region having a channel portion extending to the surface of said trench;

an insulated gate electrode disposed in said trench adjacent said channel portion of said base region for controlling the conductivity of said channel portion between said first and second main terminal regions for carriers of said one conductivity type;

a first main electrode disposed on said first major surface and ohmically connected to said first main terminal region;

a second main electrode disposed on said first major surface and ohmically connected to said second main terminal region; and

a base electrode separate from said first and second main electrodes and ohmically connected to said base region;

said device being free of first main terminal region to base region and second main terminal region to base region short circuits whereby said device is bidirectional and the conductivity of said channel region is determined by the potential of said insulated gate electrode relative to said base region.