Waveform generator for electrosurgical apparatus
First Claim
1. A waveform generator for controlling the waveform and power output of electrosurgical apparatus, said waveform generator comprising:
- a clock for providing a REFERENCE FREQUENCY signal,a counter responsive to said REFERENCE FREQUENCY signal that counts to a selected number and then provides a SHIFT REGISTER LOAD signal,an address counter responsive to a N BITS OF THE WAVEFORM signal and to said SHIFT REGISTER LOAD signal, said address counter providing a COUNTER LOAD signal and a SUBADDRESS signal for selecting each N bit word,an MxNxP storage means for storing waveforms where M is the maximum number of a plurality of different waveforms being stored, each waveform having a maximum length of N times P, N equals the number of a plurality of bits being output in parallel from the storage means at a time and P is the maximum number of a plurality of N bits stored for each waveform, said storage means having input address lines for selecting each waveform and a plurality of parallel output lines for providing a N bits of the waveform at a time, andsaid address counter having a counter modulus, said counter modulus being set by preloading a selected count from said storage means which selected count provides a waveform of a selected repetition frequency over a range of frequencies, reading a full count and counting to zero, as upper bit of said address counter going to zero and reloading the preloaded count,a parallel to serial shift register loaded by the N bits of the waveform in response to said SHIFT REGISTER LOAD signal, said COUNTER LOAD signal, and said REFERENCE FREQUENCY signal for converting the N bits of the waveform to a SINGLE BIT SERIAL WAVEFORM output signal for controlling power output, said output signal being selected by said SUBADDRESS signal at a speed determined by said REFERENCE FREQUENCY signal, said output signal having a maximum bit output time N times faster than the read access time of said storage means.
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Accused Products
Abstract
A waveform generator for electrosurgical apparatus disclosed includes a MxNxP storage device and a parallel to series conversion device. For the storage device, M is the maximum number of different waveforms being stored, N equals the number of bits being output from the storage device at a time and P is the maximum number of N bits that can be stored for each waveform. An address counter selects the next N bits of the waveform and these N bits loaded from the storage device into the conversion device and output in a sequential or series output signal to drive the RF power amplifier of electrosurgical apparatus. The output signal has a bit rate N times faster than the storage device is accessed.
29 Citations
7 Claims
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1. A waveform generator for controlling the waveform and power output of electrosurgical apparatus, said waveform generator comprising:
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a clock for providing a REFERENCE FREQUENCY signal, a counter responsive to said REFERENCE FREQUENCY signal that counts to a selected number and then provides a SHIFT REGISTER LOAD signal, an address counter responsive to a N BITS OF THE WAVEFORM signal and to said SHIFT REGISTER LOAD signal, said address counter providing a COUNTER LOAD signal and a SUBADDRESS signal for selecting each N bit word, an MxNxP storage means for storing waveforms where M is the maximum number of a plurality of different waveforms being stored, each waveform having a maximum length of N times P, N equals the number of a plurality of bits being output in parallel from the storage means at a time and P is the maximum number of a plurality of N bits stored for each waveform, said storage means having input address lines for selecting each waveform and a plurality of parallel output lines for providing a N bits of the waveform at a time, and said address counter having a counter modulus, said counter modulus being set by preloading a selected count from said storage means which selected count provides a waveform of a selected repetition frequency over a range of frequencies, reading a full count and counting to zero, as upper bit of said address counter going to zero and reloading the preloaded count, a parallel to serial shift register loaded by the N bits of the waveform in response to said SHIFT REGISTER LOAD signal, said COUNTER LOAD signal, and said REFERENCE FREQUENCY signal for converting the N bits of the waveform to a SINGLE BIT SERIAL WAVEFORM output signal for controlling power output, said output signal being selected by said SUBADDRESS signal at a speed determined by said REFERENCE FREQUENCY signal, said output signal having a maximum bit output time N times faster than the read access time of said storage means. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification