Method for forming a contact VIA

• US 4,962,414 A
• Filed: 06/08/1989
• Issued: 10/09/1990
• Est. Priority Date: 02/11/1988
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics (STMicroelectronics NV)
• Inventors: Miller, Robert O., Liou, Fu-Tai, Han, Yu-Pin, Farohani, Mohammed M.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): Prenty, Mark
• Application Number:
  US07/366,194
• Time in Patent Office: 488 Days
• Field of Search: 357/71, 357/71 S, 437/190, 437/189, 437/192, 437/194
• US Class Current: 257/740
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 23/485 consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts H01L23/4821, H01L23/4822, H01L23/4824, H01L23/4825 take precedence; materials H01L23/532, bond pads H01L24/02, bump connectors H01L24/10
• CPC Class Codes: H01L 23/53223 Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10S 148/147 Silicides
• CPC Class Codes: Y10S 257/915 with titanium nitride portion or region

Abstract

A method for forming a connection between two levels in a semiconductor structure includes first forming a VIA (14) through an insulating layer (12) to an underlying structure (10). Sidewall spacers (22) and (24) are formed on the vertical walls of the VIA (14). The spacers (22) and (24) have tapered surfaces. A barrier layer (30) is then formed over the bottom surface of the VIA followed by CVD deposition of a conductive layer (32) of WSi₂ to provide a conformal conductive layer. An aluminum layer (38) is then deposited by physical vapor deposition techniques with the descending portions of layer (32) providing a conductive connection between the aluminum layer (38) and the lower structure (10) in the VIA (14).

Claims

1. In an integrated circuit, a structure for connecting a first level silicon conductor and a second level metal conductor separated by an insulating layer, comprising:

an opening having substantially vertical sidewalls and extending through the insulating layer, wherein a portion of the first level conductor is exposed in the opening;

a titanium silicide layer covering the exposed portion of the first level conductor;

a titanium nitride layer covering said titanium silicide layer, the sidewalls of said opening, and a portion of an upper surface of the insulating layer; and

a conformal conductor layer of tungsten disilicide having a substantially uniform thickness and overlying all of said titanium nitride layer;

wherein the second level conductor overlies said conformal conductor layer above the insulating layer, wherein a conducting connection is made from the first level conductor through said titanium silicide layer, through said titanium nitride layer, and through said conformal layer, to said second level conductor.

2. In an integrated circuit, a structure for connecting a first level silicon conductor and a second level metal conductor separated by an insulating layer, comprising:

an opening having tapered sidewalls and extending through the insulating layer, wherein a portion of the first level conductor is exposed in the opening;

a titanium silicide layer covering the exposed portion of the first level conductor;

a titanium nitride layer covering said titanium silicide layer, the sidewalls of said opening, and a portion of an upper surface of the insulating layer; and

a conformal conductor layer of tungsten disilicide having a substantially uniform thickness and overlying all of said titanium nitride layer;

wherein the second level conductor overlies said conformal conductor layer above the insulating layer, wherein a conducting connection is made from the first level conductor through said titanium silicide layer, through said titanium nitride layer, and through said conformal conductor layer, to said second level conductor.