System for cryptographing and identification

• US 4,962,530 A
• Filed: 09/10/1987
• Issued: 10/09/1990
• Est. Priority Date: 09/10/1987
• Status: Expired due to Fees

• Current Assignee: Computer Security Corporation
• Original Assignee: Computer Security Corporation
• Inventors: Cairns, John P.
• Primary Examiner(s): Buczinski, Stephen C.
• Assistant Examiner(s): Gregory, Bernarr Earl
• Application Number:
  US07/095,405
• Time in Patent Office: 1,125 Days
• Field of Search: 380/3-5, 380/23-25, 380/49, 380/50, 380/52, 380/59, 380/9, 235/380, 235/382, 340/543, 340/712, 340/766-825.3, 340/825.31, 341/23, 341/175
• US Class Current: 713/183
• CPC Class Codes: G06F 21/83 input devices, e.g. keyboards, mice or controllers thereof
• CPC Class Codes: G06Q 20/40 Authorisation, e.g. identification of payer or payee, verification of customer or shop credentials; Review and approval of payers, e.g. check credit lines or negative lists
• CPC Class Codes: G07C 9/33 by means of a password
• CPC Class Codes: G07F 7/1041 PIN input keyboard gets new key allocation at each use

Abstract

According to the invention, the keyboard consists of a matrix of keys and variable visible indicia. Each of the variable visible indicia is associated with a key. Upon each keystroke on the keyboard, the system randomly changes the positions of all of the indicia on the matrix. Because the true value of any particular key is independent of the value displayed on the variable visible indicia, a casual observer can not learn the keystrokes being entered into the keyboard. If the code entered at the keyboard matches a stored value, the user is granted access.

Claims

1. A security apparatus for identification of a preselected code of characters by a predetermined cryptogram of symbols comprising in combination

a matrix consisting of an arrangement of a plurality of locations having selectively operable manual switches and variable visible indicia associated with said switches, said indicia operative to display letters and numerals at said locations,

said switches being sequentially actuatable with a sequence of values representing a preselected code of symbols consisting of alphanumeric characters and matrix coefficients,

a matrix coefficient consisting of a value represented by a visible indicia at a selected location at a selected sequence in said preselected code,

a first memory containing a configuration of alphanumeric characters and matrix coefficients for display on said variable visible indicia,

a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in said first memory having potential levels at addresses,

means for providing pulses to said addresses in said first memory upon the operation of a switch

means for transmitting the potential levels of said binary coded decimals from said first memory to said plurality of latches,

means for storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,

means upon operation of said switch for generating a pulse to a delay timing circuit,

means for transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,

transmitting the stored binary decimals in each of said latches to a decoding circuit and to a sending circuit,

means associated with said first memory for displaying on said variable visible indicia upon actuation of said switches of a plurality of said symbols including at least one alphanumeric character and at least one matrix coefficient in said actuated code of symbols,

means electrically connecting one of said manual switches to said sending circuit for providing a signal to said sending circuit upon operation of said manual switch,

means for depositing the binary coded decimal from said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said manual switch,

said microprocessor having a second memory accessed by the microprocessor, said microprocessor being operative for executing a program stored in said second memory,

means for storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alphanumeric character and at least one matrix coefficient,

operative to sequentially enter to said microprocessor pulses defining said actuated code of symbols,

said microprocessor having means for comparing the binary coded decimal produced by the operation of the sending circuit with the stored access code,

and means providing a signal when the transmitted binary coded decimal is not equal the stored access code.

2. The security apparatus as claimed in claim 1 wherein the variable visible indicia are light emitting diodes.

3. The security apparatus as claimed in claim 1, wherein the matrix is arranged in rows and columns.

4. The security apparatus as claimed in claim 1 wherein the matrix is a keyboard and the switches are keys of the keyboard.

5. The security apparatus as claimed in claim 1 wherein the means for displaying the symbols on the variable visible indicia is comprised of latches having means for receiving signals from the switches and lines connecting the latches to the variable visible indicia.

6. A security apparatus for identification of a preselected code of characters by a predetermined cryptogram of symbols:

comprising in combination a plurality of latches,

a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in a first memory having potential levels at addresses,

selectively operable switches,

means for providing pulses to said addresses in said first memory,

upon the operation of a switch,

means for transmitting the potential levels of said binary coded decimals from said first memory to said plurality of latches,

means for storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,

means upon said operation of said switch for generating a pulse to a delay timing circuit,

means for transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,

means for transmitting the stored binary decimals in each of said latches to a decoding circuit and to a sending circuit,

means for decoding the stored binary coded decimals in the decoding circuit to read out the potential levels to segments of a light emitting diode,

means electrically connecting one of said selectively operable switches to said sending circuit for providing a signal to said sending circuit upon operation of said switch.

means for depositing the binary coded decimal from said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said switch,

said microprocessor having a second memory accessed by the microprocessor, said microprocessor being operative for executing a program stored in said second memory,

means for storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alpha-numeric character and at least one matrix coefficient,

operative to sequentially enter to said microprocessor pulses defining said actuated code of symbols,

said microprocessor having means for comparing the binary coded decimal produced by the operation of the sending circuit with the stored access code,

and means providing a signal when the transmitted binary coded decimal is not equal the stored access code.

7. A security apparatus as claimed in claim 6 wherein said sending circuit comprises a buffer circuit.

8. A security apparatus as claimed in claim 6 wherein said selectively operable switches comprises keys of a keyboard.

9. The method of identifying a predetermined cryptogram of symbols comprising the steps of:

providing a predetermined program of a preselected code of symbols consisting of alphanumeric characters in binary coded decimals and matrix coefficient in a first memory having potential levels at addresses,

providing selectively operable switches,

providing pulses from said switches to said addresses in said first memory,

transmitting the potential levels of said binary coded decimals from said first memory to a plurality of latches, to provide potential levels in selected latches,

storing said binary coded decimals in said latches whereby each transmitted binary coded decimal is stored in a latch,

generating a pulse to a delay timing circuit upon the operation of a switch,

transmitting a delayed signal from said delay timing circuit to produce a timed sequence of signals selected to be transmitted to said selected latches subsequent to the storage of the binary coded decimals in said latches,

transmitting the stored binary coded decimals in each of said latches to a decoding circuit and to a circuit for sending the binary coded decimals to a microprocessor,

decoding the stored binary coded decimals in the decoding circuit to read out the potential levels to segments of a light emitting diode,

operating one of the switches to electrically connect said switch to said sending circuit for transmitting a signal to said sending circuit upon operation of said switch,

depositing the binary coded decimal stored in said sending circuit on an electrical connection to a microprocessor upon transmission of said signal from said switch,

operating said microprocessor operative for executing a program stored in a second memory,

storing in said second memory at least one access code of a preselected code of symbols consisting of at least one alphanumeric character and at least one matrix coefficient,

sequentially entering to said microprocessor pulses defining said actuated code of symbols,

comparing in the microprocessor the binary coded decimal produced by the operation of the sending circuit,

and providing a signal when the transmitted binary coded decimal is not equal the stored access code.

10. The method of identification as claimed in claim 9 wherein said sending circuit is a buffer circuit.

11. The method of identification as claimed in claim 9 wherein said switches comprise keys of a keyboard.