Broadband signal switching equipment

• US 4,963,863 A
• Filed: 10/14/1988
• Issued: 10/16/1990
• Est. Priority Date: 10/14/1987
• Status: Expired due to Fees

• Current Assignee: Siemens AG
• Original Assignee: Siemens AG
• Inventors: Hofmann, Ruediger
• Primary Examiner(s): Yusko, Donald J.
• Assistant Examiner(s): Holloway, III, Edwin C.
• Application Number:
  US07/258,020
• Time in Patent Office: 732 Days
• Field of Search: 340/825.79, 340/825.88, 340/825.89, 340/825.91, 340/825.9, 340/825.87, 340/825.93, 379/291, 379/292, 379/306.54, 307/465, 307/468, 307/448, 307/481, 307/241, 307/571, 307/279, 307/272.2
• US Class Current: 340/2.29
• CPC Class Codes: H04Q 3/523 Details

Abstract

In a broadband signal switching equipment having crosspoint matrix using FET technology devices crosspoint-associated storage memory cells that control switching elements are each formed with two cross-coupled n-MOS inverter circuits each of which has its input side connected via a selection transistor to a selection line that carries a non-inverted and an inverted selection signal of one selection direction, respectively. Both selection transistors receive on their control electrodes the selection signal of the other selection direction. The control electrodes of two load transistors of the two cross-coupled n-channel inverter circuits are connected to the selection line that carries the inverted selection clock signal of the other selection direction. An additional driver transistor of the same channel type as two driver transistors in the two cross-coupled n-channel inverter circuits is inserted between the two drive transistors of the two cross-coupled n-channel inverter circuits and ground or a feed potential terminal. The control electrode of this additional driver transistor is connected to the selection line that carries the inverted selection clock signal of the other selection direction.

Claims

1. A broadband signal switching equipment having a crosspoint matrix using FET technology devices whose switching elements are controlled by crosspoint-associated storage memory cells (Hij) driven in two coordinates each of which is formed by two cross-coupled MOS inverter circuits (Tnl'"'"', Tnt'"'"';

Tnl") wherein one of the inverter circuits (Tnl'"'"', Tnt'"'"') has its input side connected via a first selection transistor (Tnh'"'"') to a selection line (xi) that carries a non-inverted selection signal of one selection direction and wherein the other of the inverter circuits (Tnl", Tnt") has its input side connected via a selection transistor (Tnh") to a selection line (xi)that carries an inverted selection signal of the same selection direction, both selection transistors (Tnh'"'"', Tnh") receiving on their control electrodes a selection signal of the other selection direction, comprising control electrodes of two load transistors (Tnl'"'"';

Tnl") of the two cross-coupled inverter circuits being connected to a selection line (yj)that carries an inverted selection clock signal of the other selection direction.

2. The broadband signal switching equipment according to claim 1, wherein an additional driver transistor (Tnt) of the same channel type as a channel type of two driver transistors (Tnt'"'"';

Tnt") in the two cross-coupled inverter circuits, the two driver transistors having the same channel type, is connected between the two driver transistors (Tnt'"'"';

Tnt") of the two cross-coupled inverter circuits and a feed potential terminal, a control electrode of said additional driver transistor being connected to the selection line (yj)that carries the inverted selection clock signal of the other selection direction.

3. The broadband signal switching equipment according to claim 1, wherein the cross-coupled MOS inverter circuits are n-channel inverter circuits.

4. The broadband signal switching equipment having a crosspoint matrix using FET technology devices whose switching elements are controlled by crosspoint-associated storage memory cells driven in two coordinates each of which is formed by first and second cross-coupled MOS inverter circuits wherein the first inverter circuit has an input side connected via a first selection transistor to a selection line (xi) that carries a non-inverted selection signal of one selection direction and wherein the second inverter circuit has an input side connected via a second selection transistor to a selection line (xi)that carries an inverted selection signal of the same selection direction, each of said first and second selection transistors having a control electrode connected to a selection line (yi) that carries a selection signal of the other selection direction, comprising control electrodes of two load transistors int he two cross-coupled inverter circuits being connected to a selection line (yj)that carries an inverted selection signal of the other selection direction.

5. The broadband signal switching equipment according to claim 4, wherein an additional driver transistor is connected between two driver transistors of the two cross-coupled inverter circuits and a feed potential terminal, a control electrode of said additional driver transistor being connected to the selection line (yj)that carries the inverted selection signal of the other selection direction.

6. The broadband signal switching equipment according to claim 5, wherein the additional driver transistor is of the same channel type as the two driver transistors, the two driver transistors having the same channel type.

7. The broadband signal switching equipment according to claim 4, wherein the cross-coupled MOS inverter circuits are n-channel inverter circuits.

8. The broadband signal switching equipment having a crosspoint matrix using FET technology devices whose switching elements are controlled by crosspoint-associated storage memory cells driven in two coordinates each of which is formed by first and second cross-coupled MOS n-channel inverter circuits wherein the first inverter circuit has an input side connected via a first selection transistor to a selection line (xi) that carries a non-inverted selection signal of one selection direction and wherein the second inverter circuit has an input side connected via a second selection transistor to a selection line (xi)that carries an inverted selection signal of the same selection direction, each of said first and second selection transistors having a control electrode connected to a selection line (yi) that carries a selection signal of the other selection direction, comprising control electrodes of two load transistors in the two cross-coupled inverter circuits being connected to a selection line (yj)that carries an inverted selection signal of the other selection direction, and an additional driver transistor connected between two driver transistors in the two cross-coupled inverter circuits and a feed potential terminal, a control electrode of said additional driver transistor being connected to the selection line (yj)that carries the inverted selection signal of the other selection direction, said additional driver transistor being of the same channel type as the two driver transistors, the two driver transistors having the same channel type.

9. The broadband signal switching equipment according to claim 8, wherein said non-inverted and inverted selection signals of both said selection directions are clock signals.