Automatic wake-up circuit arrangement for a single wire multiplex switch monitoring system

• US 4,965,550 A
• Filed: 10/30/1989
• Issued: 10/23/1990
• Est. Priority Date: 10/30/1989
• Status: Expired due to Fees

• Current Assignee: Chrysler Motors Corp (Stellantis NV)
• Original Assignee: Chrysler Corporation (Stellantis NV)
• Inventors: Wroblewski, Thomas R.
• Primary Examiner(s): Crosland, Donnie L.
• Application Number:
  US07/429,114
• Time in Patent Office: 358 Days
• Field of Search: 340/524, 340/525, 340/505, 340/518, 340/459, 340/461, 340/825.08, 340/825.1, 340/825.15, 364/431.11, 364/424.1, 364/550, 364/551.01, 371/15.1, 371/16.5, 371/29.1
• US Class Current: 340/524
• CPC Class Codes: B60R 16/0315 using multiplexing techniques multiplexing for transmission of signals G08C15/00; multiplexing for electrical communication in general H04J
• CPC Class Codes: G08B 26/002 only replying the state of the sensor

Abstract

Continuous status monitoring of a plurality of switches and smart sensors associated with the switches, wherein each sensor is connected to a separate single point in a single wire bus is a affected by a smart sensor multiplex arrangement employing an automatic wake-up circuit. The automatic wake-up circuit allows activation of any switch of a group of high priority switches to automatically take a microcontroller out of a wait mode and causes it to go into a POWER-ON mode. In the POWER-ON mode, power routes all circuits in the entire system and then a polling of all the switches and sensor modules is performed.

Claims

1. A single-wire serial link multiplex switch monitoring system containing a wake-up circuit arrangement for automatically monitoring a plurality of individual switches disposed throughout chosen locations of a monitored region, each of said switches having one end of a series-resistor sensing element connected to a moving switch element of said switches, said system comprising:

(a) a power and signal bi-directional single wire bus means, said bus means being routed throughout the monitored region near each of said plurality of switches;

(b) a first and a second group of smart switch sensor means disposed throughout the monitored region, each of said sensor means having means for forming a first connection across the series-resistor sensing element for each of said plurality of switches, and another means for forming a second connection across said bus means and a ground terminal, each of said switch sensor means having circuit means for providing current signals which route to said bus means, each of said current signal means placing a current signal on said bus means during a predetermined time slot of a given polling cycle of said sensor means, said current signals being indicative of a status of said moving switch element of said switches and of said sensor associated with the predetermined time slot, each of said first group of smart switch sensor means having a stay-awake circuit means connected to said series-resistor sensing element of a high priority switch, said high priority switch and said stay awake circuit means providing a current signal on said bus means for waking up said system from a standby or wait condition;

(c) a driver and receiver means connected single-ended across a ground terminal and a terminating end of said single-wire bus means for generating power and voltage signals in the form of an offset, square-wave, pulse-train signal comprising a succession of coded-pulse signals superimposed over an offset-voltage signal, said coded-pulse signals providing a series of address codes for addressing said plurality of switches disposed at the remote locations during a POWER-ON condition, said pulse train being driven onto to said bus means from said driver and receiver circuit means, said first group of sensor means being connected to said bus means so as to receive said pulse train and to use a plurality of "states" of a first address pulse of said pulse train to awake said system from a wait or standby condition if one of said high priority switches has been activated, the awaking of said system causing a polling of both said first and second groups of sensor means, the polling also being initiated if said system is manually activated by a manual switch means used to apply power to said system, said polling of each sensor means being so that each of said plurality of sensor means are addressed in sequence and then allotted individual predetermined time on said bus means, the addressing of each sensor means and the allotment of time on said bus means being performed in a chosen sequential manner, the sequential manner forming the polling cycle of said sensor means, the polling of each sensor being at a chosen polling cycle rate, said driver and receiver circuit means also having means for receiving, interpreting and then converting said current signals sent over said bus means by an addressed first or second group sensor means into voltage signals indicative of the status of said addressed senor means and its associated switch;

(d) display means for displaying the status of each of said first and second groups of sensor means and said associated switches;

(e) a regulated voltage means having an input terminal connected to an unregulated voltage source and producing therefrom an immediate regulated voltage signal at a first output terminal, a first and a second delayed regulated voltage signal at a second and a third output terminal in response to a control signal indicative that one of the high priority switches or said manual switch means had been activated; and

(f) microcontroller means having a first input terminal connected to said first output terminal of said regulated voltage means for providing power to a wait mode circuit within said microcontroller means, a second input terminal connected to said manual switch means for causing said microcontroller means to leave said WAIT mode and to start operating in a POWER-ON mode and a third input terminal connected to an output terminal of said driver and receiver circuit means that provides voltage signals indicative of the current signals placed on said bus means during the POWER-ON mode of said microcontroller means for reading voltage signals from said driver and receiver circuit means indicative of the status of each of said addressed sensor means and its associated switch, for causing the microcontroller means to go from the "WAIT" mode to the "POWER-ON" mode when one of the high priority switches or said manual switch means had been activated and for establishing a history of performance of each of said addressed sensor means, at least a pair of output terminals interconnecting said drive and receiver circuit means and said display means for writing voltage and clock signals to said driver and receiver circuit means that controls the generation of each pulse of the offset square wave voltage pulse train including the plurality of "states", a bus output terminal for transferring updated independent sensor means and switch data indicative of the status of said sensor means and said switches to said display means during each polling cycle and during each wake-up operation and a logic output terminal for routing control signals to said regulated voltage means.

2. Apparatus in accordance with claim 1 wherein said microcontroller means includes means connected to said second input terminal for sensing the activation of said manual switch means and producing therefrom, if said manual switch has been activated, a logic signal at said third output terminal that routes to a logic input terminal of said regulated voltage means to cause said regulated voltage means to provide a POWER-ON mode voltage signal to said microcontroller means and a source voltage signal to said driver and receiver circuit means, said POWER-ON voltage signal causing logic signal generation means connected to said pair of output terminals for transferring logic signals to said driver and receiver circuit means for generating said coded pulse signals used to address all said switch sensor means connected to said bus means in order to poll said plurality of switches.

3. Apparatus in accordance with claim 2 wherein said microcontroller means includes timing means connected to said pair of output terminals for transferring logic signals to said driver and receiver circuit means when said manual switch is not activated to cause a first address pulse to issue from said driver and receiver circuit means and travel over said bus means to said first group of smart sensors means for causing any of said first group of sensor means, connected to an activated switch, to place a current signal on said bus which said driver and receiver means could sense and then convert to a voltage signal that routes to said logic output terminal, said microcontroller means also including means connected to said pair of output terminals for generating said pulse train used to poll all of said plurality of switches disposed at the remote locations.

4. Apparatus in accordance with claim 4 wherein each sensor means of said first group of sensor means connected to said high priority switches has means connected to said bus means and means connected to an associated high priority switch for reading the first address pulse signal and for reading the occurrence of the activation of the high priority switch respectively, and producing therefrom at an output terminal a current signal that routes over said bus means back to said driver and receiver means, wherein said driver and receiver means converts said current signal into a voltage signal and then routes the voltage signal to said third input terminal of said microcontroller means to cause said microcontroller means to go from the "WAIT" mode to the "POWER-ON" mode which wakes up said switch monitoring system.