Architectural arrangement for a SCSI disk controller integrated circuit

• US 4,965,801 A
• Filed: 09/28/1987
• Issued: 10/23/1990
• Est. Priority Date: 09/28/1987
• Status: Expired due to Term

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: NCR Corporation
• Inventors: DuLac, Keith B.
• Primary Examiner(s): Shaw, Gareth D.
• Assistant Examiner(s): Ray, Gopal C.
• Application Number:
  US07/101,452
• Time in Patent Office: 1,121 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 371/40.1
• US Class Current: 714/769
• CPC Class Codes: G06F 3/0601 Interfaces specially adapted for storage systems
• CPC Class Codes: G06F 3/0673 Single storage device

Abstract

A SCSI disk controller integrated circuit (SDC IC) provides much of the hardware necessary to perform asynchronous data transfers between a SCSI host bus and a disk interface circuit through two on-chip rotating buffers. The SDC IC is designed to be used in conjunction with a microprocessor and a stored microprocessor program. The SDC IC with its numerous registers reduce external parts by allowing some of the SCSI disk controller functions to be performed in software rather than hardware. On-chip sequence controllers and the rotating buffers of the SDC IC help the microprocessor to separate the control functions and the data transfer functions in order to maximize data transfer throughput. By arranging the control registers, the rotating buffers, and the sequence controller on a single integrated circuit a high performance, compact and inexpensive disk controller can be built using the SDC IC, a microprocessor and a small number of additional integrated circuits.

Claims

1. A SCSI disk controller arrangement for transferring digital data between a SCSI bus and a disk interface according to a control program comprising:

ROM means for storing the control program;

microprocessor means connected to the ROM means for executing the control program therein; and

SCSI disk controller integrated circuit means, connected to the SCSI bus at a first interface thereof, connected to the disk interface by a disk data input bus and a disk data output bus, and connected to the microprocessor means via a microprocessor bus, for controlling the transfer of data between the SCSI bus and the disk interface under control of the microprocessor means.

2. The SCSI disk controller arrangement as set forth in claim 1, wherein the SCSI disk controller integrated circuit means includes:

SCSI data and control means for transferring data and control signals between said SCSI data and control means and the SCSI bus in cooperation with the microprocessor means;

buffer means connected to the SCSI data and control means for temporarily storing data as the data is being transferred;

buffer control means connected to the SCSI data and control means and the buffer means for controlling the transfer of data into and out of the buffer means;

error detection and correction means connected to the disk interface and connected to and cooperating with the microprocessor means for detecting or correcting an error in the data transferred between the error detection and correction means and the disk interface; and

disk data and control means connected to the buffer means and the buffer control means for controlling the transfer of data between the error detection and correction means and the buffer means in cooperation with the buffer control means.

3. A SCSI disk controller integrated circuit for use with a SCSI data bus, a microprocessor executing a control program, and a disk interface;

comprising;

SCSI data and control means for transferring data and control signals to and from the SCSI bus in cooperation with the microprocessor;

buffer means connected to the SCSI data and control means for temporarily storing data as the data is being transferred;

buffer control means connected to the SCSI data and control means and the buffer means for controlling the transfer of data into and out of the buffer means;

error detection and correction means connected to the disk interface and connected to and cooperating with the microprocessor for detecting or correcting an error in the data transferred between the error detection and correction means and the disk interface;

disk data and control means connected to the buffer means and the buffer control means for controlling the transfer of data between the error detection and correction means and the buffer means in cooperation with the buffer control means; and

direct memory access means connected to the SCSI data and control means, the buffer control means, and the disk data and control means for controlling the transfer of data, which was inputted from the disk interface, from the buffer means to the SCSI data and control means, and the transfer of data, which was inputted from the SCSI bus, from the buffer means to the disk data and control means.

4. The SCSI disk controller integrated circuit as set forth in claim 3, wherein the buffer means includes a plurality of rotating buffers, each having buffer storage for a plurality of bytes, and may be written to and read from in the rotational manner.

5. The SCSI disk controller integrated circuit as set forth in claim 3, wherein the disk data and control means includes a control store means for receiving and storing from the microprocessor a controller program defining an operation of the disk data and control means.

6. The SCSI disk controller integrated circuit as set forth in claim 4, wherein the disk data and control means includes a control store means for receiving and storing from the microprocessor a controller program defining an operation of the disk data and control means.

7. An architectural arrangement for a SCSI disk controller integrated circuit for use with a SCSI bus, a disk interface circuit, and a microprocessor;

comprising in combination;

a SCSI data and control circuit occupying a portion of the SCSI disk controller integrated circuit and having connections for connecting with the SCSI bus;

an error detection and correction circuit occupying a portion of the SCSI disk controller circuit and having connections for connecting with the disk interface circuit;

a disk data and control circuit occupying a portion of the SCSI disk controller integrated circuit and connecting to the error detection and correction circuit;

a DMA and buffer control circuit occupying a portion of the SCSI disk controller integrated circuit and having connections to the SCSI data and control circuit, and the disk data and control circuit;

a first rotating buffer circuit occupying a portion of the SCSI disk controller integrated circuit connected to the DMA and buffer control circuit, and switchably connected to the SCSI data and control circuit and the disk data and control circuit under the control of the DMA and buffer control circuit; and

a second rotating buffer circuit occupying a portion of the SCSI disk controller integrated circuit connected to the DMA and buffer control circuit, and switchably connected to the SCSI data and control circuit and the disk data and control circuit under the control of the DMA and buffer control circuit;

whereby data may be transferred between the SCSI bus and the disk interface via at least one of the rotating buffer circuits under control of the DMA and buffer control circuit.

8. The architectural arrangement for a SCSI disk controller integrated circuit according to claim 7, wherein the SCSI data and control circuit arbitrates for access of the SCSI bus under the control of the microprocessor.

9. The architectural arrangement for a SCSI disk controller integrated circuit according to claim 8, wherein data is transferred between one of the rotating buffers and the disk interface via the error detection and correction circuit.

10. The architectural arrangement for a SCSI disk controller integrated circuit according to claim 9, wherein a single bit error in a data transferred between one of the rotating buffers and the disk interface is detected by the error detection and correction circuit, and is corrected by the error detection and correction circuit under the control of the microprocessor running an error correction program.

11. A SCSI disk controller integrated circuit for use with a SCSI bus, a disk interface circuit, and a microprocessor, comprising:

a SCSI data and control circuit occupying a portion of the SCSI disk controller integrated circuit and having connections for connecting with the SCSI bus;

an error detection and correction circuit occupying a portion of the SCSI disk controller circuit and having connections for connecting with the disk interface circuit;

a disk data and control circuit occupying a portion of the SCSI disk controller integrated circuit and connecting to the error detection and correction circuit;

a DMA and buffer control circuit occupying a portion of the SCSI disk controller integrated circuit and having connections to the SCSI data and control circuit, and the disk data and control circuit;

a first rotating buffer circuit occupying a portion of the SCSI disk controller integrated circuit connected to the DMA and buffer control circuit, and switchably connected to the SCSI data and control circuit and the disk data and control circuit under the control of the DMA and buffer control circuit; and

a second rotating buffer circuit occupying a portion of the SCSI disk controller integrated circuit connected to the DMA and buffer control circuit, and switchably connected to the SCSI data and control circuit and the disk data and control circuit under the control of the DMA and buffer control circuit.