Cellular telephone apparatus
First Claim
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1. A cellular telephone apparatus comprising:
- a duplex transceiver;
a logic unit comprising a data processor operable at a first clock frequency coupled to the transceiver for processing data received by or to be transmitted by the transceiver and a microcontroller operable at a second clock frequency higher than said first clock frequency coupled to the data processor for utilizing data produced by the data processor and for providing data to the data processor by the transceiver for transmission;
a clock generator for supplying a first clock signal to the microcontroller; and
means coupled to said clock generator for generating a second clock signal which is supplied to the data processor, the second clock signal being of lower frequency than, and in synchronism with, the first clock signal.
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Abstract
A cellular telephone apparatus in which several functions such as decoding and encoding data signals, detecting the busy/idle bit and transponding the SAT signal, are carried out by a CMOS data processor (20) which is separate from a CMOS micro-controller (34). The data processor (20) can be operated at a lower clock frequency (1.2 MHz) than the micro-controller (34) which enables current to be saved compared to processing these functions in software using the micro-controller.
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Citations
12 Claims
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1. A cellular telephone apparatus comprising:
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a duplex transceiver; a logic unit comprising a data processor operable at a first clock frequency coupled to the transceiver for processing data received by or to be transmitted by the transceiver and a microcontroller operable at a second clock frequency higher than said first clock frequency coupled to the data processor for utilizing data produced by the data processor and for providing data to the data processor by the transceiver for transmission; a clock generator for supplying a first clock signal to the microcontroller; and means coupled to said clock generator for generating a second clock signal which is supplied to the data processor, the second clock signal being of lower frequency than, and in synchronism with, the first clock signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
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Specification
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Current AssigneeUS Philips Corporation (Koninklijke Philips N.V.)
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Original AssigneeUS Philips Corporation (Koninklijke Philips N.V.)
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InventorsHart, Peter, Sharpe, Robin, Van de Mortel, Petrus P.
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Primary Examiner(s)Ng, Jin F.
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Assistant Examiner(s)Shehata, Magdy
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Application NumberUS07/265,648Time in Patent Office721 DaysField of Search379/58, 379/63, 379/59, 455/89, 455/73, 455/33, 455/54, 455/56, 455/186US Class Current370/277CPC Class CodesH04W 52/0293 having a sub-controller wit...Y02D 30/70 in wireless communication n...
