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Method for forming a silicon membrane with controlled stress

  • US 4,966,663 A
  • Filed: 09/13/1988
  • Issued: 10/30/1990
  • Est. Priority Date: 09/13/1988
  • Status: Expired due to Term
First Claim
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1. A method for fabricating a silicon membrane with a desired characteristic and level of internal stress comprising the steps of:

  • (a) selecting a silicon substrate with a first electrical conductivity characteristic, said substrate having first and second opposite sides;

    (b) selecting a dopant according to the desired characteristic of internal stress, said dopant having a second electrical conductivity characteristic of opposite polarity to said first electrical conductivity characteristic;

    (c) forming a doped layer of predetermined thickness adjacent to said first surface of said substrate wherein the concentration of said dopant is selectively controlled to provide the desired level of internal stress in said doped layer;

    (d) electrochemically etching a portion of said second surface of said substrate to a boundary of said doped layer, thereby forming a stress controlled membrane having a thickness approximately equal to the thickness of said doped layer.

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