Modular crossbar interconnection metwork for data transactions between system units in a multi-processor system
First Claim
1. In a multi-processing system of the kind having a system control unit (SCU) for operating a plurality of system units in a parallel fashion, said system units including a plurality of central processing units (CPUs), at least one input/output (I/O) unit and at least one main memory unit (MMU), interconnection means for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, said interconnection means comprising:
- at least two crossbar modules, each module adapted to establish a direct path or mapping between one of a fixed number of source nodes and one of the same fixed number of destination nodes defined thereupon, the source and destination nodes provided on one crossbar module corresponding to different ones of said system units than those provided on other crossbar modules,each of said modules including at least one expansion source node and at least one corresponding expansion destination node through which the crossbar modules are connectable in such a way as to establish a data path between source nodes defined on one of said crossbar modules and destination nodes defined on another of said crossbar modules,wherein said interconnection means further comprises;
means for accepting control commands designating the source and destination nodes for executing a data transaction,means for determining whether the designated source and destination nodes are defined on a single crossbar module or are defined on separate crossbar modules,means for generating a control signal to said single crossbar module containing both the source and destination nodes in order to establish the required data path by a direct mapping between said nodes, andmeans for generating separate control signals to each of said crossbar modules on which the source and destination nodes are separately defined in order to establish the required data path by an indirect mapping between said nodes, said indirect mapping being established by (i) a first sub-mapping between the designated source node and the expansion node of the crossbar module containing said source node and (ii) a second sub-mapping between the designated destination node and the expansion node of the crossbar module containing said destination node.
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Accused Products
Abstract
For efficiently handling data transactions between various system units (CPUs, I/O units and main memory units) in a multi-processor system, the system units are linked via a plurality of expandable crossbar modules, each providing a set of interconnections or well-defined mappings between the sets of input and output nodes, with each output being defined in terms of only one input. In addition to the nodes provided at the input and output sections, each crossbar module is also provided with discrete input and output expansion portions through which the module may be linked to other identically configured crossbar modules when additional nodes are to be integrated into the system. The expansion ports allow serial linking of crossbar modules so as to establish a connection between source and destination nodes which are spread across different crossbar modules. The serially-linked expansion ports realize direct mapping between all system nodes in the form of a two-stage network; the basic crossbar design remains the same and there is no need for the problematic redesign of crossbar modules for accommodating added data transfer nodes. The modular crossbar design is particularly adapted for use with different system configurations having different numbers of communication nodes and permits a system to be upgraded by adding communication nodes by using additional identically configured crossbar modules.
106 Citations
12 Claims
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1. In a multi-processing system of the kind having a system control unit (SCU) for operating a plurality of system units in a parallel fashion, said system units including a plurality of central processing units (CPUs), at least one input/output (I/O) unit and at least one main memory unit (MMU), interconnection means for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, said interconnection means comprising:
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at least two crossbar modules, each module adapted to establish a direct path or mapping between one of a fixed number of source nodes and one of the same fixed number of destination nodes defined thereupon, the source and destination nodes provided on one crossbar module corresponding to different ones of said system units than those provided on other crossbar modules, each of said modules including at least one expansion source node and at least one corresponding expansion destination node through which the crossbar modules are connectable in such a way as to establish a data path between source nodes defined on one of said crossbar modules and destination nodes defined on another of said crossbar modules, wherein said interconnection means further comprises; means for accepting control commands designating the source and destination nodes for executing a data transaction, means for determining whether the designated source and destination nodes are defined on a single crossbar module or are defined on separate crossbar modules, means for generating a control signal to said single crossbar module containing both the source and destination nodes in order to establish the required data path by a direct mapping between said nodes, and means for generating separate control signals to each of said crossbar modules on which the source and destination nodes are separately defined in order to establish the required data path by an indirect mapping between said nodes, said indirect mapping being established by (i) a first sub-mapping between the designated source node and the expansion node of the crossbar module containing said source node and (ii) a second sub-mapping between the designated destination node and the expansion node of the crossbar module containing said destination node. - View Dependent Claims (2, 3, 4)
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5. A multi-processing computer system comprising:
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a plurality of system units, said system units including a plurality of central processing units (CPUs), at least one input/.output (I/O) unit, and at least one main memory unit (MMU); and interconnection means for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, said interconnection means including; at least two crossbar modules;
each module including means for establishing a direct path between one of a fixed number of source nodes and one of the same fixed number of destination nodes defined thereupon, and at least one expansion source node and at least one corresponding expansion destination node, the expansion source and expansion destination nodes of one crossbar module being connected to the expansion destination and expansion source nodes, respectively, of the other module for enabling a data path to be established between source nodes defined on one crossbar module and destination nodes defined on the other crossbar module;means for accepting control commands designating the source and destination nodes for executing a data transaction, means for determining whether the designated source and destination nodes are defined on a single crossbar module or are defined on separate crossbar modules, means for generating a control signal to said single crossbar module containing both the source and destination nodes in order to establish the required data path by a direct mapping between said nodes; and means for generating separate control signals to each of said crossbar modules on which the source and destination nodes are separately defined in order to establish the required data path by an indirect mapping between said nodes, said indirect mapping being established by (i) a first sub-mapping between the designated source node and the expansion node of the crossbar module containing said source node and (ii) a second sub-mapping between the designated destination node and the expansion node of the crossbar module containing said destination node. - View Dependent Claims (6, 7, 8)
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9. In a multi-processing system of the kind having a system control unit (SCU) for operating a plurality of system units in a parallel fashion, said system units including a plurality of central processing units (CUPs), at least one input/output (I/O) unit, and at least one main memory unit (MMU), interconnection means for establishing communication paths for data transactions between system units designated by communication commands as source and destination nodes, said interconnection means comprising:
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at least two crossbar modules, each module adapted to establish a direct path between one of a fixed number of source nodes and one of a fixed number of destination nodes defined thereupon, each crossbar module having a respective demultiplexer for each source node and a respective multiplexer for each destination node, each demultiplexer in each crossbar module having an input connected to its respective source node and a respective output for each of the destination nodes in said each crossbar module, each multiplexer in each crossbar module having an output connected to its respective destination node and a respective input connected to a respective output of each of the demultiplexers in said each crossbar module, each of said modules including at least one expansion source node and at least one corresponding expansion destination node, the expansion source node of each module being connected directly to the expansion destination node of another one of the modules, to thereby establish a data path between source nodes defined on one of said crossbar modules and destination nodes defined on another of said crossbar modules; and control means for operating said demultiplexers and said multiplexers in said modules for executing data transactions between designated source and destination nodes, said control means including means responsive when the designated source and destination nodes are defined on a single crossbar module for operating the demultiplexer of the designated source node and the multiplexer of the designated destination node in order to establish the required data path by a direct path between the designated source and destination nodes, and means responsive when the designated source and destination nodes are defined on separate crossbar modules for operating the demultiplexer of the designated source node and the multiplexer of the destination expansion node on a first one of the separate crossbar modules, and for operating the multiplexer of the destination node and the demultiplexer of the expansion source node on a second one of the separate crossbar modules, in order to establish the required data path by an indirect path between said nodes, said indirect path including the expansion destination node on the module having the designated source node, and the expansion source node on the module having the designated destination node. - View Dependent Claims (10, 11, 12)
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Specification