Switched capacitor waveform processing circuit
First Claim
1. A switched capacitor waveform processing circuit for processing an input waveform comprising:
- a first switched input capacitor having first and second plates;
a discharge circuit means for providing capacitor plate discharge;
a first operational amplifier having a negative input, positive input and an output, said positive input being coupled to said discharge circuit means;
a first feedback capacitor having first and second plates coupled respectively to said amplifier negative input and output;
first switch means for coupling when closed and uncoupling when open said switched capacitor first plate to said discharge circuit means and for coupling when closed and uncoupling when open said switched capacitor second plate to said amplifier negative input;
second switch means for coupling when closed and uncoupling when open said switched capacitor first plate to a first input waveform to obtain a waveform sample and for coupling when closed and uncoupling when open said switched capacitor second plate to said discharge circuit means;
switching circuit means for momentary closing at a switching frequency of fs of said first and second switch means, and for closing said first switch means in time spaced sequence during each period T of said fs from the closing of said second switch means;
the ratio of the capacitance of said switched input capacitor to the capacitance of said feedback capacitor providing a predetermined weighting of said sample;
said period T providing a predetermined time delay to said sample to obtain a predetermined waveform output at said amplifier output.
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Accused Products
Abstract
Waveform inputs are sampled to provide vector inputs which are coupled to respective ones of a plurality of series connected time delay stages in a processing circuit. Each vector is weighted, or amplified, and time delayed by each stage between its input point and the circuit output. Each stage has switched capacitors and an operational amplifier. The delay of each stage is the period of the capacitor switching frequency. All of the components in the stages and vector input circuitry are solid state switches, capacitors or operational amplifiers and therefore are especially suitable for integration in a monolithic or film substrate. The circuit is particularly adapted to beam steering a plurality of waveform inputs from an array of hydrophones.
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Citations
10 Claims
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1. A switched capacitor waveform processing circuit for processing an input waveform comprising:
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a first switched input capacitor having first and second plates; a discharge circuit means for providing capacitor plate discharge; a first operational amplifier having a negative input, positive input and an output, said positive input being coupled to said discharge circuit means; a first feedback capacitor having first and second plates coupled respectively to said amplifier negative input and output; first switch means for coupling when closed and uncoupling when open said switched capacitor first plate to said discharge circuit means and for coupling when closed and uncoupling when open said switched capacitor second plate to said amplifier negative input; second switch means for coupling when closed and uncoupling when open said switched capacitor first plate to a first input waveform to obtain a waveform sample and for coupling when closed and uncoupling when open said switched capacitor second plate to said discharge circuit means; switching circuit means for momentary closing at a switching frequency of fs of said first and second switch means, and for closing said first switch means in time spaced sequence during each period T of said fs from the closing of said second switch means; the ratio of the capacitance of said switched input capacitor to the capacitance of said feedback capacitor providing a predetermined weighting of said sample;
said period T providing a predetermined time delay to said sample to obtain a predetermined waveform output at said amplifier output. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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Specification