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Error reduction method and apparatus for a direct digital synthesizer

  • US 4,975,699 A
  • Filed: 12/01/1989
  • Issued: 12/04/1990
  • Est. Priority Date: 12/01/1989
  • Status: Expired due to Term
First Claim
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1. Circuitry for converting a digital input comprising an N bit word including A bits and B bits where A and B are integers and A+B=N into a desired sine voltage, said circuitry comprising:

  • a memory means addressed by said A bits, said memory means storing binary sine values, binary cosine values and binary correction values for outputting a selected sine A value, cosine A value and correction value in response to a selected address of A bits;

    means for forming a binary output comprising the expression sin (A)+B cos (A) from said selected sin (A) and cos (A) values;

    a first digital-to-analog converting means for converting said binary output to an analog sine approximation voltage exhibiting a deviation from the desired sine voltage; and

    means receiving a selected one of said correction values for generating a compensation voltage for compensating for said deviation from said desired sine voltage, said means includinga second digital-to-analog converting means for converting said correction value to an analog correction voltage; and

    attenuation means for attenuating said analog correction voltage for generating said compensation voltage.

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