Error reduction method and apparatus for a direct digital synthesizer
First Claim
1. Circuitry for converting a digital input comprising an N bit word including A bits and B bits where A and B are integers and A+B=N into a desired sine voltage, said circuitry comprising:
- a memory means addressed by said A bits, said memory means storing binary sine values, binary cosine values and binary correction values for outputting a selected sine A value, cosine A value and correction value in response to a selected address of A bits;
means for forming a binary output comprising the expression sin (A)+B cos (A) from said selected sin (A) and cos (A) values;
a first digital-to-analog converting means for converting said binary output to an analog sine approximation voltage exhibiting a deviation from the desired sine voltage; and
means receiving a selected one of said correction values for generating a compensation voltage for compensating for said deviation from said desired sine voltage, said means includinga second digital-to-analog converting means for converting said correction value to an analog correction voltage; and
attenuation means for attenuating said analog correction voltage for generating said compensation voltage.
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Abstract
A circuit for generating an analog sine voltage from a digital phase input (11) employing a memory (13) storing sine and cosine values and a correction value for each phase and first and second digital-to-analog converters (DACs) (19,21). For each digital phase input (N), selected sine and cosine values are combined and the result is read out to the first DAC (19), which generates an analog sine approximation voltage. A corresponding correction value is simultaneouosly read out to the second DAC (21), whose output is scaled by an attenuator (23) to provide a correction voltage for correcting the deviation in the output voltage of the first DAC (19) from the ideal sine voltage value.
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Citations
7 Claims
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1. Circuitry for converting a digital input comprising an N bit word including A bits and B bits where A and B are integers and A+B=N into a desired sine voltage, said circuitry comprising:
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a memory means addressed by said A bits, said memory means storing binary sine values, binary cosine values and binary correction values for outputting a selected sine A value, cosine A value and correction value in response to a selected address of A bits; means for forming a binary output comprising the expression sin (A)+B cos (A) from said selected sin (A) and cos (A) values; a first digital-to-analog converting means for converting said binary output to an analog sine approximation voltage exhibiting a deviation from the desired sine voltage; and means receiving a selected one of said correction values for generating a compensation voltage for compensating for said deviation from said desired sine voltage, said means including a second digital-to-analog converting means for converting said correction value to an analog correction voltage; and attenuation means for attenuating said analog correction voltage for generating said compensation voltage. - View Dependent Claims (2, 3, 4, 5)
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6. A method of compensating for errors in a circuit wherein digital approximations of trigonometric values are stored in a memory and used to generate a sine approximation value for supply to a digital-to-analog converter (DAC) which generates a sine approximation voltage, comprising the steps of:
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measuring the deviation of said sine approximation voltage from the desired sine voltage; deriving a digital correction value for compensating for said deviation; storing said digital correction value; and employing the stored digital correction value to compensate for said deviation. - View Dependent Claims (7)
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Specification