High breakdown active device structure with low series resistance

• US 4,975,751 A
• Filed: 10/05/1988
• Issued: 12/04/1990
• Est. Priority Date: 09/09/1985
• Status: Expired due to Term

• Current Assignee: Fairchild Semiconductor Corporation (ON Semiconductor Corporation)
• Original Assignee: Harris Corporation (L3Harris Technologies, Inc.)
• Inventors: Beasom, James D.
• Primary Examiner(s): James, Andrew J.
• Assistant Examiner(s): Crane, Sara W.
• Application Number:
  US07/253,437
• Time in Patent Office: 790 Days
• Field of Search: 357/13, 357/23.4, 357/23.8, 357/34, 357/37, 357/38, 357/90, 357/20, 357/23.3
• US Class Current: 257/172
• CPC Class Codes: H01L 29/0821 Collector regions of bipolar transistors
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1016 Anode base regions of thyristors
• CPC Class Codes: H01L 29/7436 Lateral thyristors
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7816 Lateral DMOS transistors, i.e. LDMOS transistors
• CPC Class Codes: H01L 29/8611 Planar PN junction diodes

Abstract

Series resistance in the low impurity portion of a high breakdown PN junction of a three or four layer device is reduced by providing an increased impurity region at the junction of the same conductivity type as the low impurity portion and having an impurity profile such that the increased impurity region is depleted under reverse biasing before critical field is reached therein. The three layer device include insulated gate field effect transistors and bipolar devices and the four layer device is an SCR.

Claims

1. In a three layer device having, in ascending order of impurity concentrations, a first region of a first conductivity type, a second region of a second conductivity type in said first region and a third region of said first conductivity type in said second region, the improvement comprising:

a fourth region of said first conductivity type in said first region, totally separating said first and second regions, and extending equally from said second region laterally and vertically;

said fourth region having a substantially higher impurity concentration than said first region adjacent said second region and decreasing therefrom so that said fourth region is depleted under reverse biasing before breakdown between said first and fourth regions and said second region.

2. In a four layer device, having a first region of a first conductivity type, a second region adjacent said first region of a second conductivity type, a third region totally separated from said first region by said second region of said first conductivity type and a fourth region totally separated from said second region by said third region of said second conductivity type, the improvement comprising:

a fifth region of said first conductivity type and a substantially higher impurity concentration that said third region and lower impurity concentration than said second region totally separating said second and third regions, and

a sixth region of said first conductivity type and a substantially higher impurity concentration than said third region and lower impurity concentration than said fourth region totally separating said third and fourth regions and spaced from said fifth region.

3. In a four layer device according to claim 2, wherein the impurity concentration of said fifth region decreases from adjacent said second region so that said fifth region is depleted by reverse biasing before breakdown between said second region and said third and fifth regions.

4. In a four layer device according to claim 3, wherein said fifth region extends equally from said second region laterally and vertically.

5. In a four layer device according to claim 3, wherein the impurity concentration profile of said fifth region is such that depletion of said fifth region and breakdown between said second region and said third and fifth regions occurs substantially simultaneously under reverse biasing.

6. In a two layer device having a first region of a first conductivity type and a first impurity concentration and a second region of a second conductivity type in said first region and having a second impurity concentration greater than said first impurity concentration, the improvement comprising:

a third region of said first conductivity type in said first region, totally separating said first and second regions, and extending equally from said second region laterally and vertically;

said third region having a substantially higher impurity concentration than said first region adjacent said second region and decreasing therefrom so that said third region is depleted under reverse biasing before breakdown between said second region and said first and third regions.

7. In a two layer device according to claim 12, wherein the impurity concentration profile of said third region is such that depletion of said third region and breakdown between said second region and said first and third regions occurs substantially simultaneously under reverse biasing.

8. In a three layer device having, in ascending order of impurity concentrations, a first region of a first conductivity type, a second region of a second conductivity type in said first region and a third region of said first conductivity type in said second region, the improvement comprising:

a fourth region of said first conductivity type in said first region, totally separating said first and second regions, and extending equally from said second region laterally and vertically;

said fourth region having a higher impurity concentration adjacent said second region and decreasing therefrom so that said fourth region, under reverse biasing, is depleted substantially simultaneously with breakdown between said second region and said first and fourth regions.

9. In an insulated gate field effect transistor having, in ascending order of impurity concentrations, a drain region of a first conductivity type, a body region of a second conductivity type, a source region of said first conductivity type in said body region and a gate separated from said body by an insulator, the improvement comprising:

a fourth region of said first conductivity type in said drain region and totally separating said drain and body regions, said fourth region having a higher impurity concentration adjacent said body region and decreasing therefrom so that said fourth region is depleted under reverse biasing before breakdown occurs between said body region and said drain and fourth regions.

10. In a bipolar device having, in ascending order of impurity concentrations, a collector region of a first conductivity type, a base region of a second conductivity type in said collector region and an emitter region of said first conductivity type in said base region, the improvement comprising:

a fourth region of said first conductivity type in said collector region and totally separating said collector and base regions, said fourth region having a substantially higher impurity concentration than said collector adjacent said base region and decreasing therefrom so that said fourth region is depleted under reverse biasing before breakdown between said collector and fourth regions and said base region; and

wherein said bipolar transistor is a high breakdown voltage device including a collector contact region having a higher impurity concentration that said fourth region and being in said collector region spaced from said fourth region.

11. In a bipolar device having, in ascending order of impurity concentrations, a collector region of a first conductivity type, a base region of a second conductivity type in said collector region and an emitter region of said first conductivity type in said base region, the improvement comprising:

a fourth region of said first conductivity type in said collector region and totally separating said collector and base regions, said fourth region having a substantially higher impurity concentration than said collector adjacent said base region and decreasing therefrom so that said fourth region is depleted under reverse biasing before breakdown between said collector and fourth regions and said bas region; and

wherein said bipolar transistor is a low breakdown voltage device including a collector contact region having a higher impurity concentration than said collector region and being at least partially in said fourth region.