Current source with a process selectable temperature coefficient

• US 4,978,631 A
• Filed: 07/25/1986
• Issued: 12/18/1990
• Est. Priority Date: 07/25/1986
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Blanchard, Richard A.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Wilczewski, M.
• Application Number:
  US06/890,218
• Time in Patent Office: 1,607 Days
• Field of Search: 29/571, 357/23.12, 148/187, 307/296 R, 307/297, 437/24, 437/37
• US Class Current: 438/281
• CPC Class Codes: H01L 21/28185 with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
• CPC Class Codes: H01L 29/51 Insulating materials associated therewith for MIS structures on thin film semiconductor H01L29/4908
• CPC Class Codes: H01L 29/7802 Vertical DMOS transistors, i.e. VDMOS transistors

Abstract

A transistor (Q3, Q4) is configured to act as a current source. Of importance, the current provided by the current source has a process-selectable temperature dependence. By introducing ions into the transistor gate insulation (14, 20) the current provided by the current source can be either temperature independent, inversely related to temperature, or directly related to temperature, as desired.

Claims

1. A method for forming a current source comprising the steps of:

forming a gate insulation layer on a portion of a surface of semiconductor material;

introducing ions into said gate insulation layer, said ions retaining their charge;

forming a gate on said gate insulation layer;

forming a source region and a drain region within said semiconductor material; and

electrically connecting said source region to said gate,

wherein said method further comprises the step of controlling the temperature coefficient of said current source, said step of controlling comprising the step of controlling the number of said ions in said gate insulation layer.

3. The method of claim 1 or 2 wherein the current provided by said current source is inversely related to temperature.

4. The method of claim 1 or 2 wherein the current provided by said current source is temperature-independent.

5. The method of claim 1 or 2 wherein the current provided by said current source increases in response to an increase in temperature.

6. The method of claim 1 or 2 wherein said ions are positive.

7. The method of claim 1 or 2 wherein said ions are negative.

8. The method of claim 1 or 2 wherein said ions comprise cesium or iodine.

2. A method for forming a current source comprising the steps of:

forming a gate insulation layer on a portion of a surface of semiconductor material;

introducing ions into said gate insulation layer, said ions retaining their charge;

forming a gate on said gate insulation layer;

forming a source and a body region within said semiconductor material, a portion of said semiconductor material serving as a drain; and

electrically connecting said source region to said gate,

wherein said method further comprises the step of controlling the temperature coefficient of said current source, said step of controlling comprising the step of controlling the number of ions in said gate insulation layer.

9. A method for forming a current source comprising the steps of:

forming a gate insulation layer on a portion of a surface of semiconductor material;

introducing ions into said gate insulation layer, said ions retaining their charge;

forming a source and drains within said semiconductor material;

forming a gate on said gate insulation layer; and

providing a DC voltage across said gate and source,

and wherein said method further comprises the step of controlling the temperature coefficient of said current source, said step of controlling comprising said step of controlling the number of said ions in said gate insulation layer.

10. A method for forming a current source comprising the steps of:

forming a gate insulation layer on a portion of a surface of semiconductor material;

introducing ions into said gate insulation layer, said ions retaining their charge;

forming a gate on said gate insulation layer;

forming a source and body region within said semiconductor material, a portion of said semiconductor material serving as a drain; and

providing a DC voltage across said gate and source,

and wherein said method further comprises the step of controlling the temperature coefficient of said current source, said step of controlling comprising the step of controlling the number of ions in said gate insulation layer.