A/D converter

• US 4,978,958 A
• Filed: 10/11/1989
• Issued: 12/18/1990
• Est. Priority Date: 07/20/1989
• Status: Expired due to Fees

• Current Assignee: Visteon Global Technologies Incorporated (Visteon Corporation)
• Original Assignee: Ford Motor Company
• Inventors: Walker, Noel A.
• Primary Examiner(s): Shoop, Jr., William M.
• Assistant Examiner(s): Hoff, Marc S.
• Application Number:
  US07/419,803
• Time in Patent Office: 433 Days
• Field of Search: 341/159, 341/161, 341/162, 341/164, 341/165, 341/155
• US Class Current: 341/159
• CPC Class Codes: G07C 5/006 Indicating maintenance
• CPC Class Codes: H03M 1/129 Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling H03M1/18 takes precedence; Out-of-range indication

Abstract

Method and apparatus for sampling an analog voltage and providing a digital representation of the sampled voltage by binary switching individual resistive networks in parallel with a reference leg of a comparator circuit and combining binary switching signals with the comparator output signal.

Claims

1. A circuit for converting an analog electrical signal to a digital signal comprising:

means containing sampling and reference input terminals and an output terminal for comparing said analog signal applied to said sampling terminal with a predetermined D.C. reference level applied to said reference input terminal to generate a first binary level output signal on said output terminal corresponding to said analog signal having a value determined by said comparing means as being greater than said predetermined reference level and a second binary level ouput signal having a value determined by said comparing means as being greater than said predetermined reference level;

means for applying a predetermined reference level to said reference input terminal of said comparing means, wherein said reference level applying means includes a reference voltage divider circuit including at least two reference resistors connected in series between a D.C. voltage source and ground;

N switchable resistive networks connected in parallel with at least one of the series resistors in said reference voltage divider circuit, wherein "N" is a positive integer being greater than zero (0);

means for individually switching each of said switchable resistive networks into and out of electrical connection in parallel with said at least one of the series resistors in said reference voltage divider circuit, wherein each of said N switchable resistive networks includes at least one resistor connected in series with an electrical switch that is controllable to open and close in response to applied binary signals, and each switch being connected to a corresponding control terminal; and

whereby, the selection of binary signals applied to said N control terminals and monitoring of the binarY output signal from said comparing means provides a combined digital binary output representation of the sampled analog signal value to be at least within R adjacent voltage ranges where R=2^N -1.

2. An analog to digital converter circuit as in claim 1 wherein the selection of binary signals applied to said N control terminals and monitoring of the binary output signal from said comparing means provides a digital representation of the sampled analog signal to be within and outside a number R of adjacent voltage ranges.

3. An analog to digital converter circuit as in claim 1 wherein said reference level applying means includes a first reference resistor electrically connected between the D.C. voltage source and the reference input terminal and said second reference resistor connected between the reference input terminal and ground.

4. An analog to digital converter circuit as in claim 3 wherein said N switchable resistive networks are connected between said reference input terminal and ground in parallel with each other and with said second reference resistor to provide L separate levels of reference voltage, where L=2^N.

5. A method of converting an analog electrical signal to a digital signal comprising the steps of:

providing means containing sampling and reference input terminals and an output terminal for comparing said analog signal applied to said sampling terminal with a predetermined D.C. reference level applied to said reference input terminal to generate a first binary level output signal on said output terminal corresponding to said analog signal having a value determined by said comparing means as being greater than said predetermined reference level and a second binary level ouput signal having a value determined by said comparing means as being greater than said predetermined reference level;

providing means for applying a predetermined reference level to said reference input terminal of said comparing means, wherein said reference level applying means includes a reference voltage divider circuit including at least two reference resistors connected in series between a D.C. voltage source and ground;

providing N switchable resistive networks connected in parallel with at least one of the series resistors in said reference voltage divider circuit, wherein "N" is a positive integer being greater than zero (0);

providing means for individually switching each of said switchable resistive networks into and out of electrical connection in parallel with said at least one of the series resistors in said reference voltage divider circuit wherein each of said N switchable resistive networks includes at least one resistor connected in series with an electrical switch that is controllable to open and close in response to applied binary signals, and each switch being connected to a corresponding control terminal;

applying a predetermined set of binary signals to the N control terminals to apply a predetermined one of L selectable D.C. reference levels to said reference input terminal, where L=2^N ;

monitoring the output signal on said output terminal of said comparing means;

comparing the combination of said predetermined binary signals and said output signal with predetermined combinations to determine that said sampled voltage has a value that is relatively above or below the applied predetermined reference level;

repeating the applying step whenever the comparing step indicates the sampled voltage to be above the applied predetermined reference level with a different predetermined set of binary signals to said N terminals to select the next adjacent selected D.C. reference level.

6. A method as in claim 5, wherein the selection of binary signals applied to said N control terminals and monitoring of the binary output signal from said comparing means provides a digital representation of the sampled analog signal as being within and outside a number R of adjacent voltage ranges, and wherein R=L-1.

7. A method as in claim 5, wherein said reference level providing means includes a first reference resistor electrically connected between a D.C. voltage source and the reference input terminal and said second reference resistor connected between the reference input terminal and ground.

8. A method as in claim 7, wherein said N switchable resistive networks are connected between said reference input terminal and ground in parallel with each other and with said second reference resistor.