Apparatus for transmitting patient physiological signals

• US 4,987,902 A
• Filed: 12/30/1988
• Issued: 01/29/1991
• Est. Priority Date: 12/30/1988
• Status: Expired due to Term

• Current Assignee: Creditanstalt-Bankverein (Unicredit SPA)
• Original Assignee: Physio-Control Incorporated (Stryker Corporation)
• Inventors: Couche, Charles A.
• Primary Examiner(s): Cohen, Lee S.
• Assistant Examiner(s): Schaetzle, Kennedy J.
• Application Number:
  US07/292,496
• Time in Patent Office: 760 Days
• Field of Search: 128/908, 128/901, 128/696, 128/664, 324/99 D
• US Class Current: 600/509
• CPC Class Codes: A61B 5/301 providing electrical separation, e.g. by using isolating transformers or optocouplers
• CPC Class Codes: A61B 5/308 for electrocardiography [ECG]

Abstract

An apparatus (10) for transmitting a patient physiological signal is provided. A converter (12) includes a front end circuit (28) that receives and conditions a patient physiological signal, V_P, and produces conditioned signal, V_C. A magnitude of V_C is proportional to an amplitude of V_P offset by a negative DC voltage. A track and ramp circuit (30) receives V_C and produces a tracking voltage, V_T. A magnitude of V_T is inversely proportional to the magnitude of V_C when the track and ramp circuit is in a tracking mode. A controller (16) includes a clock that produces clock pulses, V_CK and a divider (38) that divides the clock pulse frequency and produces a trigger pulse, V_TRIG. A leading edge of the V_TRIG pulse starts a counter (40) counting V_CK pulses. The leading edge of an optically transmitted V_TRIG pulse is applied to the latch circuit (32), which produces a ramp command voltage, V_R. A high V.sub. R voltage places the track and ramp circuit (30) in a ramping mode and causes the magnitude of V_T to decay at a constant rate. The latch circuit produces an echo pulse, V_E, when V_T decays to zero volts. An optically transmitted V_E pulse is applied to the counter (40). A leading edge of the optically transmitted V_E pulse stops the counter (40) from counting V_CK pulses. The counter (40) produces an output signal, S_OUT, having a value in the form of V_CK pulses counted by the counter (40) during the elapsed time between the production of the V_TRIG pulse and the receipt of the optically transmitted V_E pulse. The S_OUT value is proportional to the amplitude of V_P.

Claims

1. An apparatus for transmitting a patient physiological signal, the apparatus comprising:

(a) a converter including means for receiving a first signal and the patient physiological signal and for producing a second signal in response thereto, such that a time delay from receipt of said first signal to production of said second signal encodes said patient physiological signal;

(b) control means comprising means for producing said first signal, means for receiving said second signal, and means for determining an estimated time delay by measuring the time elapsed between the production of said first signal and receipt of said second signal, whereby the estimated time delay provides a measure of the patient physiological signal; and

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(c) optical coupler means coupled to the converter and to the control means such that said optical coupler means transmits said first signal from said control means to said converter and transmits said second signal from said converter to said control means.

2. The apparatus of claim 1, wherein said converter comprises:

(a) front end circuit means coupled to receive said patient physiological signal, said front end circuit means conditioning said patient physiological signal and producing a conditioned signal, such that a magnitude of said conditioned signal is a function of said patient physiological signal; and

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(b) echo circuit means coupled to said front end circuit means for receiving said conditioned signal, said echo circuit means receiving said first signal and producing said second signal, wherein said first signal comprises a leading edge of a trigger pulse and said second signal comprises a leading edge of an echo pulse.

3. The apparatus of claim 2, wherein said echo circuit means comprises:

(a) track and ramp circuit means coupled to receive said conditioned signal and produce a tracking voltage, such that when said track and ramp circuit means is in a tracking mode a magnitude of said tracking voltage is related to said magnitude of said conditioned signal and when said track and ramp circuit means is in a ramping mode said magnitude of said tracking voltage changes at a predetermined rate; and

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(b) latch circuit means coupled to said track and ramp circuit means, said latch circuit means receiving said trigger pulse and producing a ramp command voltage in response to said leading edge of said trigger pulse and removing said ramp command voltage when said tracking voltage changes to said predetermined level, such that a magnitude of said ramp command voltage determines whether said track and ramp circuit means is in said tracking mode or said ramping mode.

4. The apparatus claimed in claim 3, wherein said magnitude of said tracking voltage is inversely proportional to said conditioned signal.

5. The apparatus of claim 3, wherein said track and ramp circuit means is in said tracking mode when said magnitude of said ramp command voltage has a high value and in said ramping mode when said magnitude of said ramp command voltage has a low value.

6. The apparatus of claim 5, wherein said magnitude of said ramp command voltage has a high value when said latch circuit means is reset and a low value when said latch circuit means is set.

7. The apparatus of claim 3, wherein said magnitude of said tracking voltage changes at a constant rate when said track and ramp circuit means is in said ramping mode.

8. The apparatus of claim 7, wherein said track and ramp circuit means is in said tracking mode when said magnitude of said ramp command voltage has a high value and in said ramping mode when said magnitude of said ramp command voltage has a low value.

9. The apparatus of claim 8, wherein said magnitude of said ramp command voltage has a high value when said latch circuit means is reset and a low value when said latch circuit means is set.

10. The apparatus of claim 3, wherein said magnitude of said tracking voltage decays at a constant rate when said track and ramp circuit means is in said ramping mode.

11. The apparatus of claim 10, wherein said track and ramp circuit means is in said tracking mode when said magnitude of said ramp command voltage has a high value and in said ramping mode when said magnitude of said ramp command voltage has a low value.

12. The apparatus of claim 11, wherein said magnitude of said ramping voltage has a high value when said latch circuit means is reset and a low value when said latch circuit means is set.

13. The apparatus of claim 12, wherein said latch circuit means produces said echo pulse and resets when said magnitude of said tracking voltage decays to zero volts.

14. The apparatus of claim 2, wherein said means for determining an estimated time delay comprises:

(a) a clock for producing clock pulses at a clock pulse frequency;

(b) a divider coupled to said clock for dividing said clock pulse frequency and producing said trigger pulse; and

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(c) counter means coupled to said clock and said divider for receiving said clock pulses and said trigger pulse, wherein said counter means starts counting said clock pulses when said counter means receives said leading edge of said trigger pulse and stops counting when said counter means receives said leading edge of said echo pulse, said counter means producing an output signal in the form of clock pulses counted by said counter means.

15. The apparatus of claim 14, wherein said echo circuit means comprises:

(a) track and ramp circuit means coupled to receive said conditioned signal and produce a tracking voltage, such that when said track and ramp circuit means is in a tracking mode a magnitude of said tracking voltage is related to said magnitude of said conditioned signal and when said track and ramp circuit means is in a ramping mode said magnitude of said tracking voltage changes at a predetermined rate; and

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(b) latch circuit means coupled to said track and ramp circuit means, said latch circuit means receiving said trigger pulse and producing a ramp command voltage in response to said leading edge of said trigger pulse and removing said ramp command voltage when said tracking voltage changes to said predetermined level, such that a magnitude of said ramp command voltage determines whether said track and ramp circuit means is in said tracking mode or said ramping mode.

16. The apparatus claimed in claim 15, wherein said magnitude of said tracking voltage is inversely proportional to said conditioned signal.

17. The apparatus of claim 15, wherein said track and ramp circuit means is in said tracking mode when said magnitude of said ramp command voltage has a high value and in said ramping mode when said magnitude of said ramp command voltage has a low value.

18. The apparatus of claim 17, wherein said magnitude of said ramp command voltage has a high value when said latch circuit means is reset and a low value when said latch circuit means is set.

19. The apparatus of claim 18, wherein said magnitude of said tracking voltage decays at a constant rate and said latch circuit means produces said echo pulse and resets when said magnitude of said tracking voltage decays to zero volts.

20. The apparatus of claim 2, wherein said front end circuit means comprises an ECG preamplifier.

21. The apparatus of claim 20, wherein said means for determining an estimated time delay comprises;

(a) a clock for producing clock pulses at a clock pulse frequency;

(b) a divider coupled to said clock for dividing said clock pulse frequency and producing said trigger pulse; and

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(c) counter means coupled to said clock and said divider for receiving said clock pulses and said trigger pulse, wherein said counter means starts counting said clock pulses when said counter means receives said leading edge of said trigger pulse and stops counting when said counter means receives said leading edge of said echo pulse, said counter means producing an output signal in the form of clock pulses counted by said counter means.

22. The apparatus of claim 21, wherein said echo circuit means comprises:

(a) track and ramp circuit means coupled to receive said conditioned signal and produce a tracking voltage, such that when said track and ramp circuit means is in a tracking mode a magnitude of said tracking voltage is related to said magnitude of said conditioned signal and when said track and ramp circuit means is in a ramping mode said magnitude of said tracking voltage changes at a predetermined rate; and

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(b) latch circuit means coupled to said track and ramp circuit means, said latch circuit means receiving said trigger pulse and producing a ramp command voltage in response to said leading edge of said trigger pulse and removing said ramp command voltage when said tracking voltage attains a predetermined level, such that a magnitude of said ramp command voltage determines whether said track and ramp circuit means is in said tracking mode or said ramping mode.

23. The apparatus claimed in claim 22, wherein said magnitude of said tracking voltage is inversely proportional to said conditioned signal.

24. The apparatus of claim 22, wherein said track and ramp circuit means is in said tracking mode when said magnitude of said ramp command voltage has a high value and in said ramping mode when said magnitude of said ramp command voltage has a low value.

25. The apparatus of claim 24, wherein said magnitude of said ramp command voltage has a high value when said latch circuit means is reset and a low value when said latch circuit means is set.

26. The apparatus of claim 25, wherein said magnitude of said tracking voltage decays at a constant rate and said latch circuit means produces said echo pulse and resets when said magnitude of said tracking voltage decays to zero volts.