Method for optimizing utilization of a cache memory

• US 4,991,088 A
• Filed: 11/30/1988
• Issued: 02/05/1991
• Est. Priority Date: 11/30/1988
• Status: Expired due to Fees

• Current Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Original Assignee: VLSI Technology, Inc. (Koninklijke Philips N.V.)
• Inventors: Kam, Edward O. K.
• Primary Examiner(s): Fleming, Michael R.
• Assistant Examiner(s): Ray, Gopal C.
• Application Number:
  US07/277,871
• Time in Patent Office: 797 Days
• Field of Search: 364/200 MS File, 364/900 MS File, 364/300
• US Class Current: 717/160
• CPC Class Codes: G06F 8/4442 Reducing the number of cache misses; Data prefetching cache prefetching G06F12/0862

Abstract

A method is provided for minimizing cache misses in a compiled computer program having loop instructions. The compiled computer program is examined to identify a set of compiled loop instructions which is smaller than a cache memory block. The set of compiled loop instructions may straddle two blocks of main memory, which would cause cache misses when the program is executed. The identified set of compiled loop instructions is therefore positioned to fall entirely within the boundaries of a block of main memory so that cache misses are avoided when the set of compiled loop instructions is executed. Loop-invariant instructions are removed from the set of compiled loop instructions. When blocks of the main memory unit are mapped into the cache memory in a set-associative manner, external-call locations are mapped into different rows of the main memory then the corresponding loop instructions. As a result, when blocks of main memory are transferred to the cache memory unit, cache misses are avoided.

Claims

1. A method of optimizing utilization of a cache memory unit in a computer system running a compiled computer program having loop instructions, said computer system having a main memory unit, which has an array of blocks of a predetermined block size, and having a cache memory unit with a multiplicity of blocks of said predetermined size, comprising the steps of:

storing a set of compiled loop instructions of a compiled computer program in said main memory unit;

locating a set of compiled loop instructions which is stored in the main memory unit and which is smaller than the predetermined block size of said cache memory unit;

denoting the memory boundaries of said identified set of compiled loop instructions within said main memory unit;

moving the instructions of said located set of compiled loop instructions so that said instructions are stored within the boundaries of one of said predetermined blocks of said main memory unit;

loading said identified set of compiled loop instructions into said cache memory unit; and

running said identified set of loop instructions in said computer system;

thereby optimizing operation of said cache memory unit when said identified set of compiled loop instructions is loaded into said cache memory unit and the identified set of loop instructions is run in said computer system and cache misses are avoided for said identified set of loop instructions.

2. The method of claim 1 including the steps of:

locating, within said identified set of compiled instructions, a loop-invariant expression which yields the same result independent of the number of times that said identified set of compiled loop instructions is executed; and

moving said loop-invariant expression outside of the boundaries of said one of said predetermined blocks of said main memory unit, within which boundaries are stored said identified set of compiled of loop instructions.

3. The method of claim 1, wherein said blocks in said main memory unit are arranged in rows each containing a multiplicity of memory blocks, and wherein said cache memory unit is a set-associative cache memory unit containing a memory block corresponding to each of said rows of blocks in said main memory unit;

the method further including the steps of locating external-call instructions within said located set of compiled loop instructions, said external call instructions each calling a targeted main memory location; and

moving the contents of said compiled computer program stored within said main memory such that the set of compiled loop instructions containing said external-call instructions and said targeted main memory locations are not on the same row of said main memory;

whereby when said block of main memory is transferred to the cache memory unit, the targeted memory location is contained within the cache memory simultaneously with the set of compiled loop instructions.

4. The method of claim 1, wherein said compiled computer program includes a plurality of sets of compiled loop instructions, which are stored in the main memory unit and transferred to said cache memory unit during running of said compiled computer program.

5. The method of claim 1, wherein said compiled loop instructions include a larger set of loop instructions which is greater than the predetermined block size of said cache memory unit, the method further including the step of moving instructions of said larger set of instructions within said main memory so that said moved instructions fall within the boundaries of a minimum number of predetermined blocks of main memory.