Flexible electrical interconnect and method of making

• US 4,991,290 A
• Filed: 06/16/1989
• Issued: 02/12/1991
• Est. Priority Date: 07/21/1988
• Status: Expired due to Term

• Current Assignee: Stovokor Technology LLC (Intellectual Ventures LLC)
• Original Assignee: Microelectronics and Computer Technology Corporation
• Inventors: MacKay, Colin A.
• Primary Examiner(s): Eley, Timothy V.
• Application Number:
  US07/369,596
• Time in Patent Office: 606 Days
• Field of Search: 29/854, 29/857, 29/847, 29/874, 29/884, 439/67
• US Class Current: 29/884
• CPC Class Codes: H01L 21/486 Via connections through the substrate with or without pins
• CPC Class Codes: H01R 12/62 connecting to rigid printed circuits or like structures
• CPC Class Codes: H01R 12/714 with contacts abutting directly the printed circuit; Button contacts therefore provided on the printed circuit
• CPC Class Codes: H05K 1/0393 Flexible materials H05K1/038 takes precedence; specific organic compositions are classified in H05K1/0313 and subgroups
• CPC Class Codes: H05K 1/113 Via provided in pad; Pad over filled via
• CPC Class Codes: H05K 2201/0347 Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias reinforcing the conductive pattern H05K3/24
• CPC Class Codes: H05K 2201/0355 Metal foils
• CPC Class Codes: H05K 2201/0367 Metallic bump or raised conductor not used as solder bump solder materials or compositions and methods of application thereof H05K3/3457
• CPC Class Codes: H05K 2201/0394 Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
• CPC Class Codes: H05K 2201/096 Vertically aligned vias, holes or stacked vias
• CPC Class Codes: H05K 2201/09781 Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
• CPC Class Codes: H05K 2201/10378 Interposers
• CPC Class Codes: H05K 2203/0338 Transferring metal or conductive material other than a circuit pattern, e.g. bump, solder, printed component affixing a prefabricated conductor pattern H05K3/20
• CPC Class Codes: H05K 2203/0554 Metal used as mask for etching vias, e.g. by laser ablation
• CPC Class Codes: H05K 2203/063 of preperforated insulating layer
• CPC Class Codes: H05K 2203/0726 Electroforming, i.e. electroplating on a metallic carrier thereby forming a self-supporting structure
• CPC Class Codes: H05K 2203/0733 Method for plating stud vias, i.e. massive vias formed by plating the bottom of a hole without plating on the walls
• CPC Class Codes: H05K 2203/1572 Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
• CPC Class Codes: H05K 3/064 Photoresists
• CPC Class Codes: H05K 3/4007 Surface contacts, e.g. bumps H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3457
• CPC Class Codes: H05K 3/423 : characterised by electroplating method
• CPC Class Codes: H05K 3/427 : initial plating of through-holes in metal-clad substrates
• CPC Class Codes: Y10T 29/49169 : Assembling electrical component directly to terminal or elongated conductor
• CPC Class Codes: Y10T 29/49222 : forming array of contacts or terminals

Abstract

A method and apparatus for making a flexible interconnect for connection between stacks of electronic components. The method includes forming a plurality of holes through a flexible insulating material, depositiong electrically conductive metal studs into the holes extending out of at least one side and preferably both sides of the flexible material, and electrically interconnecting some of the electrically conductive metal studs by interconnects supported by the flexible material. The interconnects may be supported from the outside of the flexible material or embedded therein. Dummy studs may be provided in the flexible material extending to the outside and aligned with studs extending on the other side of the insulating material which are connected to the electrical interconnects.

Claims

1. A method of making a flexible interconnect for connection between stacks of electronic components comprising,

forming a plurality of holes through a flexible insulating material,

depositing electrically conductive metal studs into said holes extending out of the top and bottom of the insulating material, and

electrically interconnecting at least some of the deposited studs by interconnects supported by the flexible material.

2. The method of claim 1 wherein at least some of the interconnects are non-parallel.

3. A method of making a flexible interconnect for connection between stacks of electronic components comprising,

forming a plurality of holes through a flexible insulating material having a layer of electrically conductive material on at least one side,

adding a resist mask layer on the conductive material,

depositing electrically conductive metal studs into at least some of said holes extending out of the top and bottom of the holes beyond the insulating material and conductive material,

removing the resist mask layer,

applying an etch mask layer on the conductive material over the conductive material to cover desired electrical interconnections while leaving undesired electrical interconnections uncovered,

etching the undesired electrical interconnections, and

removing the etch mask.

4. The method of claim 3 wherein at least some of the interconnects are non-parallel.

5. A method of making a flexible interconnect for connection between stacks of electronic components comprising,

forming a plurality of holes through a first flexible insulating material having a layer of electrically conductive material on a first side,

depositing electrically conductive metal studs into said holes,

applying an etch mask layer on the conductive material to cover desired electrical interconnections while leaving undesired electrical interconnections uncovered,

etching the undesired electrical interconnections,

removing the etch mask,

forming a plurality of holes through a second flexible insulating material,

bonding one side of the second insulating material to the electrically conductive material,

applying a resist mask on the second side of the second insulating material, and

depositing electrically conductive metal studs into the holes of the second insulating material.

6. The method of claim 5 wherein at least some of the holes in the first insulating material are aligned with the holes in the second insulating material.

7. The method of claim 5 including providing dummy studs on the outside of one of the insulating materials aligned with studs on the other of the insulating materials.

8. The method of claim 7 wherein the dummy studs are provided by applying a resist mask to the insulating material leaving the desired locations of the dummy studs bare, and

depositing dummy studs into the bare locations.

9. A method of making a flexible interconnect for connection between stacks of electronic components comprising,

forming a plurality of holes through a first flexible insulating material having a layer of electrically conductive material on a first side,

depositing electrically conductive metal studs into said holes,

applying an etch mask layer on the conductive material to cover desired electrical interconnections, wherein at least some of the interconnections are non-parallel, while leaving undesired electrical interconnections uncovered,

etching the undesired electrical interconnections,

removing the etch mask,

forming a plurality of holes through a second flexible insulating material,

bonding one side of the second insulating material to the electrically conductive material,

applying a resist mask on the second side of the second insulating material, and

depositing electrically conductive metal studs into the holes of the second insulating material.

10. The method of claim 9 wherein at least some of the holes in the first insulating material are aligned with the holes in the second insulating material.

11. The method of claim 9 including providing dummy studs on the outside of one of the insulating materials aligned with studs on the other of the insulating materials.

12. The method of claim 11 wherein the dummy studs are provided by applying a resist mask to the insulating material leaving the desired location of the dummy stud bare, and

depositing a dummy stud into the bare location.

13. A method of making a flexible interconnect for connection between stacks of electronic components comprising,

forming a plurality of holes through a flexible insulating material having first and second sides,

depositing electrically conductive metal studs into said holes extending out of at least one side of the insulating material,

electrically interconnecting at least some of the studs by interconnects supported by the flexible material, and

providing dummy studs on the second side of the flexible insulating material aligned with some of the electrically conductive metal studs.

14. The method of claim 13 wherein at least some of the interconnects are non-parallel.

15. A flexible interconnect for connection between stacks of electronic components comprising,

a flexible insulating material having a plurality of holes,

electrically conductive metal studs deposited in said holes extending out of the top and bottom of the insulating material, and

electrical interconnects between at least some of the studs by interconnects supported by the flexible material.

16. The interconnect of claim 15 wherein at least some of the interconnects are non-parallel.

17. A flexible interconnect for connection between stacks of electronic components comprising,

flexible insulating material having first and second sides having a plurality of holes,

electrically conductive metal studs deposited in said holes extending out of at least one side of the insulating material,

electrical interconnects between at least some of the electrically conductive studs by interconnects supported by the flexible material, and

dummy studs on the second side of the flexible insulating material aligned with some of the electrically conductive studs.

18. The interconnect of claim 17 wherein at least some of the interconnects are non-parallel.