Apparatus for updating time-of-day information in a signal

• US 4,993,003 A
• Filed: 08/07/1989
• Issued: 02/12/1991
• Est. Priority Date: 08/17/1988
• Status: Expired due to Fees

• Current Assignee: Deutsche Thomson-Brandt GmbH D-7730 Villingen-Schwennigen West Germany
• Original Assignee: Electronic-Werke Deutschland GmbH
• Inventors: Fechner, Rainer, Bekesi, Thomas
• Primary Examiner(s): Roskoski, Bernard
• Application Number:
  US07/389,913
• Time in Patent Office: 554 Days
• Field of Search: 368/47, 368/46, 368/48-52, 368/107-120
• US Class Current: 368/47
• CPC Class Codes: G04R 20/14 the radio signal being a telecommunication standard signal, e.g. GSM
• CPC Class Codes: H04N 5/782 on tape
• CPC Class Codes: H04N 7/0882 for the transmission of character code signals, e.g. for teletext circuits for the digital non-picture data signal H04N7/035

Abstract

A continuous time-of-day or date correction of a signal produced by a clock module is obtained from the data in a video-text or teletext signal that contains accurate time-of-day and/or date reference information. When the video-text/teletext data contain such reference information, the data of the output signal of the clock module are compared, on a continuous basis, with the received video-text/teletext. In case of a deviation between the clock module data and the reference information, a correction signal is applied to the clock module and corrects the clock module.

Claims

1. An apparatus for generating an updated output signal containing a time-of-day or date information, comprising:

a source of a video-text/teletext input signal containing a time-of-day or date reference information;

a clock generator responsive to a timing signal that is independent of said input signal for generating an output signal containing a time-of-day or date information; and

means coupled to said clock generator and responsive to said input signal for automatically updating, in accordance with the reference information, the information contained in said output signal, such that when the reference information is not used for updating said output signal, said output signal is updated in said clock generator in a free running manner in accordance with said timing signal and;

wherein said updating means comprises a comaprator means responsive to said output and input signals for generating a correction signal that is coupled back to said click generator when a difference between the information of each is detected, said correction signal correcting the information of said output signal in accordance with said input signal.

2. An apparatus according to claim 1 wherein the functions of said comparator and of said clock generator are implemented in software by a microprocessor.

3. An apparatus according to claim 1 wherein, as long as said input signal is not received or as long as it is received improperly, said clock generator generates said output signal in a manner that is updated independently of said input signal.

4. An apparatus according to claim 1 wherein said information of said output signal is updated selectively in accordance with said reference information that is contained in said input signal in one of an automatic and a manual manner.

5. An apparatus according to claim 1 wherein portions of said input signal containing correspondingly different time-of-day or date information in corresponding multilingual forms and wherein said apparatus comprises means for selecting a given portion of said portions of said input signal that contains a predetermined one of said multilingual forms for updating in accordance therwith said information of said output signal.

6. An apparatus for generating an output data signal containing a time-of-day or date information that is coupled to a display device for displaying said information therein, comprising:

a clock module for generating a first data signal containing a corresponding time-of-day or date information;

a video-text/teletext decoder for generating a second data signal containing a reference time-of-day or date information;

a first data register responsive to said first data signal, that is coupled thereto from said clock module via a common bus, for storing said first data signal therein to produce said output data signal from said stored data signal;

a second data register responsive to said second data signal, that is coupled thereto from said decoder via said common bus, for storing said second data signal;

a comparator responsive to said stored signals for detecting a data deviation therebetween to generate a control signal when said deviation is detected;

a data conversion arrangement; and

a switch responsive to said comparator control signal for coupling said stored data in said second data register to said clock module via said data conversion arrangement and via said bus for adjusting said clock module in accordance with said stored data signal in said second data register.